1 ; RUN: llc -o - -mtriple=powerpc64le-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s 2 ; RUN: llc -o - -mtriple=powerpc64-unknown-gnu-linux -stop-after codegenprepare %s | FileCheck %s --check-prefix=CHECK-BE 3 4 define signext i32 @test1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { 5 entry: 6 ; CHECK-LABEL: @test1( 7 ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64* 8 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* 9 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) 10 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) 11 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] 12 ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block 13 14 ; CHECK-LABEL: res_block:{{.*}} 15 ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64 16 ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 17 ; CHECK-NEXT: br label %endblock 18 19 ; CHECK-LABEL: loadbb1:{{.*}} 20 ; CHECK: [[GEP1:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1 21 ; CHECK-NEXT: [[GEP2:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1 22 ; CHECK-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[GEP1]] 23 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[GEP2]] 24 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) 25 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) 26 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] 27 ; CHECK-NEXT: br i1 [[ICMP]], label %endblock, label %res_block 28 29 ; CHECK-BE-LABEL: @test1( 30 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64* 31 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* 32 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] 33 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block 34 35 ; CHECK-BE-LABEL: res_block:{{.*}} 36 ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64 37 ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 38 ; CHECK-BE-NEXT: br label %endblock 39 40 ; CHECK-BE-LABEL: loadbb1:{{.*}} 41 ; CHECK-BE: [[GEP1:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1 42 ; CHECK-BE-NEXT: [[GEP2:%[0-9]+]] = getelementptr i64, i64* {{.*}}, i64 1 43 ; CHECK-BE-NEXT: [[LOAD1:%[0-9]+]] = load i64, i64* [[GEP1]] 44 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* [[GEP2]] 45 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] 46 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %endblock, label %res_block 47 48 %0 = bitcast i32* %buffer1 to i8* 49 %1 = bitcast i32* %buffer2 to i8* 50 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 16) 51 ret i32 %call 52 } 53 54 declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1 55 56 define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { 57 ; CHECK-LABEL: @test2( 58 ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32* 59 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* 60 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]]) 61 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]]) 62 ; CHECK-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[BSWAP1]], [[BSWAP2]] 63 ; CHECK-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[BSWAP1]], [[BSWAP2]] 64 ; CHECK-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32 65 ; CHECK-NEXT: [[Z2:%[0-9]+]] = zext i1 [[CMP2]] to i32 66 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[Z1]], [[Z2]] 67 ; CHECK-NEXT: ret i32 [[SUB]] 68 69 ; CHECK-BE-LABEL: @test2( 70 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32* 71 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* 72 ; CHECK-BE-NEXT: [[CMP1:%[0-9]+]] = icmp ugt i32 [[LOAD1]], [[LOAD2]] 73 ; CHECK-BE-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[LOAD1]], [[LOAD2]] 74 ; CHECK-BE-NEXT: [[Z1:%[0-9]+]] = zext i1 [[CMP1]] to i32 75 ; CHECK-BE-NEXT: [[Z2:%[0-9]+]] = zext i1 [[CMP2]] to i32 76 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[Z1]], [[Z2]] 77 ; CHECK-BE-NEXT: ret i32 [[SUB]] 78 79 entry: 80 %0 = bitcast i32* %buffer1 to i8* 81 %1 = bitcast i32* %buffer2 to i8* 82 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 4) 83 ret i32 %call 84 } 85 86 define signext i32 @test3(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { 87 ; CHECK: [[LOAD1:%[0-9]+]] = load i64, i64* 88 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* 89 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD1]]) 90 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i64 @llvm.bswap.i64(i64 [[LOAD2]]) 91 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[BSWAP1]], [[BSWAP2]] 92 ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block 93 94 ; CHECK-LABEL: res_block:{{.*}} 95 ; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64 96 ; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 97 ; CHECK-NEXT: br label %endblock 98 99 ; CHECK-LABEL: loadbb1:{{.*}} 100 ; CHECK: [[LOAD1:%[0-9]+]] = load i32, i32* 101 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* 102 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]]) 103 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]]) 104 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64 105 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64 106 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] 107 ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb2, label %res_block 108 109 ; CHECK-LABEL: loadbb2:{{.*}} 110 ; CHECK: [[LOAD1:%[0-9]+]] = load i16, i16* 111 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16* 112 ; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD1]]) 113 ; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i16 @llvm.bswap.i16(i16 [[LOAD2]]) 114 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[BSWAP1]] to i64 115 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[BSWAP2]] to i64 116 ; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] 117 ; CHECK-NEXT: br i1 [[ICMP]], label %loadbb3, label %res_block 118 119 ; CHECK-LABEL: loadbb3:{{.*}} 120 ; CHECK: [[LOAD1:%[0-9]+]] = load i8, i8* 121 ; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8* 122 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32 123 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32 124 ; CHECK-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]] 125 ; CHECK-NEXT: br label %endblock 126 127 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i64, i64* 128 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i64, i64* 129 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[LOAD1]], [[LOAD2]] 130 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb1, label %res_block 131 132 ; CHECK-BE-LABEL: res_block:{{.*}} 133 ; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64 134 ; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1 135 ; CHECK-BE-NEXT: br label %endblock 136 137 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32* 138 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32* 139 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64 140 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64 141 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] 142 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb2, label %res_block 143 144 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i16, i16* 145 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i16, i16* 146 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i16 [[LOAD1]] to i64 147 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i16 [[LOAD2]] to i64 148 ; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]] 149 ; CHECK-BE-NEXT: br i1 [[ICMP]], label %loadbb3, label %res_block 150 151 ; CHECK-BE: [[LOAD1:%[0-9]+]] = load i8, i8* 152 ; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i8, i8* 153 ; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i8 [[LOAD1]] to i32 154 ; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i8 [[LOAD2]] to i32 155 ; CHECK-BE-NEXT: [[SUB:%[0-9]+]] = sub i32 [[ZEXT1]], [[ZEXT2]] 156 ; CHECK-BE-NEXT: br label %endblock 157 158 entry: 159 %0 = bitcast i32* %buffer1 to i8* 160 %1 = bitcast i32* %buffer2 to i8* 161 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 15) 162 ret i32 %call 163 } 164 ; CHECK: call = tail call signext i32 @memcmp 165 ; CHECK-BE: call = tail call signext i32 @memcmp 166 define signext i32 @test4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) { 167 168 entry: 169 %0 = bitcast i32* %buffer1 to i8* 170 %1 = bitcast i32* %buffer2 to i8* 171 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 65) 172 ret i32 %call 173 } 174 175 define signext i32 @test5(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2, i32 signext %SIZE) { 176 ; CHECK: call = tail call signext i32 @memcmp 177 ; CHECK-BE: call = tail call signext i32 @memcmp 178 entry: 179 %0 = bitcast i32* %buffer1 to i8* 180 %1 = bitcast i32* %buffer2 to i8* 181 %conv = sext i32 %SIZE to i64 182 %call = tail call signext i32 @memcmp(i8* %0, i8* %1, i64 %conv) 183 ret i32 %call 184 } 185
