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      1 ; RUN: llc -verify-machineinstrs -O1 < %s -mcpu=pwr7 | FileCheck %s
      2 
      3 target datalayout = "E-m:e-i64:64-n32:64"
      4 target triple = "powerpc64-unknown-linux-gnu"
      5 
      6 %struct.test = type { i64, [8 x i8] }
      7 %struct.pad = type { [8 x i64] }
      8 
      9 @gt = common global %struct.test zeroinitializer, align 16
     10 @gp = common global %struct.pad zeroinitializer, align 8
     11 
     12 define signext i32 @callee1(i32 signext %x, %struct.test* byval align 16 nocapture readnone %y, i32 signext %z) {
     13 entry:
     14   ret i32 %z
     15 }
     16 ; CHECK-LABEL: @callee1
     17 ; CHECK: mr 3, 7
     18 ; CHECK: blr
     19 
     20 declare signext i32 @test1(i32 signext, %struct.test* byval align 16, i32 signext)
     21 define void @caller1(i32 signext %z) {
     22 entry:
     23   %call = tail call signext i32 @test1(i32 signext 0, %struct.test* byval align 16 @gt, i32 signext %z)
     24   ret void
     25 }
     26 ; CHECK-LABEL: @caller1
     27 ; CHECK: mr 7, 3
     28 ; CHECK: bl test1
     29 
     30 define i64 @callee2(%struct.pad* byval nocapture readnone %x, i32 signext %y, %struct.test* byval align 16 nocapture readonly %z) {
     31 entry:
     32   %x1 = getelementptr inbounds %struct.test, %struct.test* %z, i64 0, i32 0
     33   %0 = load i64, i64* %x1, align 16
     34   ret i64 %0
     35 }
     36 ; CHECK-LABEL: @callee2
     37 ; CHECK: ld 3, 128(1)
     38 ; CHECK: blr
     39 
     40 declare i64 @test2(%struct.pad* byval, i32 signext, %struct.test* byval align 16)
     41 define void @caller2(i64 %z) {
     42 entry:
     43   %tmp = alloca %struct.test, align 16
     44   %.compoundliteral.sroa.0.0..sroa_idx = getelementptr inbounds %struct.test, %struct.test* %tmp, i64 0, i32 0
     45   store i64 %z, i64* %.compoundliteral.sroa.0.0..sroa_idx, align 16
     46   %call = call i64 @test2(%struct.pad* byval @gp, i32 signext 0, %struct.test* byval align 16 %tmp)
     47   ret void
     48 }
     49 ; CHECK-LABEL: @caller2
     50 ; CHECK: std 3, [[OFF:[0-9]+]](1)
     51 ; CHECK: addi [[REG1:[0-9]+]], 1, [[OFF]]
     52 ; CHECK: lxvw4x [[REG2:[0-9]+]], 0, [[REG1]]
     53 ; CHECK: li [[REG3:[0-9]+]], 128
     54 ; CHECK: stxvw4x 0, 1, [[REG3]]
     55 ; CHECK: bl test2
     56 
     57