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      1 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
      2 ; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
      3 ; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
      4 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
      5 ; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
      6 ; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
      7 
      8 @glob = common local_unnamed_addr global i8 0, align 1
      9 
     10 ; Function Attrs: norecurse nounwind readnone
     11 define signext i32 @test_igeuc(i8 zeroext %a, i8 zeroext %b) {
     12 entry:
     13   %cmp = icmp uge i8 %a, %b
     14   %conv2 = zext i1 %cmp to i32
     15   ret i32 %conv2
     16 ; CHECK-LABEL: test_igeuc:
     17 ; CHECK: sub [[REG1:r[0-9]+]], r3, r4
     18 ; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG2]], 1, 63
     19 ; CHECK-NEXT: xori r3, [[REG2]], 1
     20 ; CHECK: blr
     21 }
     22 
     23 ; Function Attrs: norecurse nounwind readnone
     24 define signext i32 @test_igeuc_sext(i8 zeroext %a, i8 zeroext %b) {
     25 entry:
     26   %cmp = icmp uge i8 %a, %b
     27   %sub = sext i1 %cmp to i32
     28   ret i32 %sub
     29 ; CHECK-LABEL: @test_igeuc_sext
     30 ; CHECK: sub [[REG1:r[0-9]+]], r3, r4
     31 ; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
     32 ; CHECK-NEXT: addi [[REG3:r[0-9]+]], [[REG2]], -1
     33 ; CHECK-NEXT: blr  
     34   
     35 }
     36 
     37 ; Function Attrs: norecurse nounwind readnone
     38 define signext i32 @test_igeuc_z(i8 zeroext %a) {
     39 entry:
     40   %cmp = icmp uge i8 %a, 0
     41   %conv2 = zext i1 %cmp to i32
     42   ret i32 %conv2
     43 ; CHECK-LABEL: @test_igeuc_z
     44 ; CHECK: li r3, 1
     45 ; CHECK-NEXT: blr  
     46 }
     47 
     48 ; Function Attrs: norecurse nounwind readnone
     49 define signext i32 @test_igeuc_sext_z(i8 zeroext %a) {
     50 entry:
     51   %cmp = icmp uge i8 %a, 0
     52   %conv2 = sext i1 %cmp to i32
     53   ret i32 %conv2
     54 ; CHECK-LABEL: @test_igeuc_sext_z
     55 ; CHECK: li r3, -1
     56 ; CHECK-NEXT: blr  
     57 }
     58 
     59 ; Function Attrs: norecurse nounwind
     60 define void @test_igeuc_store(i8 zeroext %a, i8 zeroext %b) {
     61 entry:
     62   %cmp = icmp uge i8 %a, %b
     63   %conv3 = zext i1 %cmp to i8
     64   store i8 %conv3, i8* @glob
     65   ret void
     66 ; CHECK_LABEL: test_igeuc_store:
     67 ; CHECK: sub [[REG1:r[0-9]+]], r3, r4
     68 ; CHECK: rldicl [[REG2:r[0-9]+]], [[REG2]], 1, 63
     69 ; CHECK: xori {{r[0-9]+}}, [[REG2]], 1
     70 ; CHECK: blr
     71 }
     72 
     73 ; Function Attrs: norecurse nounwind
     74 define void @test_igeuc_sext_store(i8 zeroext %a, i8 zeroext %b) {
     75 entry:
     76   %cmp = icmp uge i8 %a, %b
     77   %conv3 = sext i1 %cmp to i8
     78   store i8 %conv3, i8* @glob
     79   ret void
     80 ; CHECK-TBD-LABEL: @test_igeuc_sext_store
     81 ; CHECK-TBD: subf [[REG1:r[0-9]+]], r3, r4
     82 ; CHECK-TBD: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
     83 ; CHECK-TBD: addi [[REG3:r[0-9]+]], [[REG2]], -1
     84 ; CHECK-TBD: stb  [[REG3]]
     85 ; CHECK-TBD: blr    
     86 }
     87 
     88 ; Function Attrs : norecurse nounwind
     89 define void @test_igeuc_z_store(i8 zeroext %a) {
     90 entry:
     91   %cmp = icmp uge i8 %a, 0
     92   %conv3 = zext i1 %cmp to i8
     93   store i8 %conv3, i8* @glob
     94   ret void
     95 ; CHECK-LABEL: @test_igeuc_z_store
     96 ; CHECK: li [[REG1:r[0-9]+]], 1
     97 ; CHECK: stb [[REG1]]
     98 ; CHECK: blr    
     99 }
    100 
    101 ; Function Attrs: norecurse nounwind
    102 define void @test_igeuc_sext_z_store(i8 zeroext %a) {
    103 entry:
    104   %cmp = icmp uge i8 %a, 0
    105   %conv3 = sext i1 %cmp to i8
    106   store i8 %conv3, i8* @glob
    107   ret void
    108 ; CHECK-LABEL: @test_igeuc_sext_z_store
    109 ; CHECK: li [[REG1:r[0-9]+]], -1
    110 ; CHECK: stb [[REG1]]
    111 ; CHECK: blr
    112 }
    113