1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 7 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8 9 @glob = common local_unnamed_addr global i8 0, align 1 10 11 ; Function Attrs: norecurse nounwind readnone 12 define i64 @test_llequc(i8 zeroext %a, i8 zeroext %b) { 13 ; CHECK-LABEL: test_llequc: 14 ; CHECK: # %bb.0: # %entry 15 ; CHECK-NEXT: xor r3, r3, r4 16 ; CHECK-NEXT: cntlzw r3, r3 17 ; CHECK-NEXT: srwi r3, r3, 5 18 ; CHECK-NEXT: blr 19 entry: 20 %cmp = icmp eq i8 %a, %b 21 %conv3 = zext i1 %cmp to i64 22 ret i64 %conv3 23 } 24 25 ; Function Attrs: norecurse nounwind readnone 26 define i64 @test_llequc_sext(i8 zeroext %a, i8 zeroext %b) { 27 ; CHECK-LABEL: test_llequc_sext: 28 ; CHECK: # %bb.0: # %entry 29 ; CHECK-NEXT: xor r3, r3, r4 30 ; CHECK-NEXT: cntlzw r3, r3 31 ; CHECK-NEXT: srwi r3, r3, 5 32 ; CHECK-NEXT: neg r3, r3 33 ; CHECK-NEXT: blr 34 entry: 35 %cmp = icmp eq i8 %a, %b 36 %conv3 = sext i1 %cmp to i64 37 ret i64 %conv3 38 } 39 40 ; Function Attrs: norecurse nounwind readnone 41 define i64 @test_llequc_z(i8 zeroext %a) { 42 ; CHECK-LABEL: test_llequc_z: 43 ; CHECK: # %bb.0: # %entry 44 ; CHECK-NEXT: cntlzw r3, r3 45 ; CHECK-NEXT: srwi r3, r3, 5 46 ; CHECK-NEXT: blr 47 entry: 48 %cmp = icmp eq i8 %a, 0 49 %conv2 = zext i1 %cmp to i64 50 ret i64 %conv2 51 } 52 53 ; Function Attrs: norecurse nounwind readnone 54 define i64 @test_llequc_sext_z(i8 zeroext %a) { 55 ; CHECK-LABEL: test_llequc_sext_z: 56 ; CHECK: # %bb.0: # %entry 57 ; CHECK-NEXT: cntlzw r3, r3 58 ; CHECK-NEXT: srwi r3, r3, 5 59 ; CHECK-NEXT: neg r3, r3 60 ; CHECK-NEXT: blr 61 entry: 62 %cmp = icmp eq i8 %a, 0 63 %conv2 = sext i1 %cmp to i64 64 ret i64 %conv2 65 } 66 67 ; Function Attrs: norecurse nounwind 68 define void @test_llequc_store(i8 zeroext %a, i8 zeroext %b) { 69 ; CHECK-LABEL: test_llequc_store: 70 ; CHECK: # %bb.0: # %entry 71 ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha 72 ; CHECK-NEXT: xor r3, r3, r4 73 ; CHECK-NEXT: ld r4, .LC0@toc@l(r5) 74 ; CHECK-NEXT: cntlzw r3, r3 75 ; CHECK-NEXT: srwi r3, r3, 5 76 ; CHECK-NEXT: stb r3, 0(r4) 77 ; CHECK-NEXT: blr 78 entry: 79 %cmp = icmp eq i8 %a, %b 80 %conv3 = zext i1 %cmp to i8 81 store i8 %conv3, i8* @glob, align 1 82 ret void 83 } 84 85 ; Function Attrs: norecurse nounwind 86 define void @test_llequc_sext_store(i8 zeroext %a, i8 zeroext %b) { 87 ; CHECK-LABEL: test_llequc_sext_store: 88 ; CHECK: # %bb.0: # %entry 89 ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha 90 ; CHECK-NEXT: xor r3, r3, r4 91 ; CHECK-NEXT: cntlzw r3, r3 92 ; CHECK-NEXT: ld r4, .LC0@toc@l(r5) 93 ; CHECK-NEXT: srwi r3, r3, 5 94 ; CHECK-NEXT: neg r3, r3 95 ; CHECK-NEXT: stb r3, 0(r4) 96 ; CHECK-NEXT: blr 97 entry: 98 %cmp = icmp eq i8 %a, %b 99 %conv3 = sext i1 %cmp to i8 100 store i8 %conv3, i8* @glob, align 1 101 ret void 102 } 103 104 ; Function Attrs: norecurse nounwind 105 define void @test_llequc_z_store(i8 zeroext %a) { 106 ; CHECK-LABEL: test_llequc_z_store: 107 ; CHECK: # %bb.0: # %entry 108 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha 109 ; CHECK-NEXT: cntlzw r3, r3 110 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) 111 ; CHECK-NEXT: srwi r3, r3, 5 112 ; CHECK-NEXT: stb r3, 0(r4) 113 ; CHECK-NEXT: blr 114 entry: 115 %cmp = icmp eq i8 %a, 0 116 %conv2 = zext i1 %cmp to i8 117 store i8 %conv2, i8* @glob, align 1 118 ret void 119 } 120 121 ; Function Attrs: norecurse nounwind 122 define void @test_llequc_sext_z_store(i8 zeroext %a) { 123 ; CHECK-LABEL: test_llequc_sext_z_store: 124 ; CHECK: # %bb.0: # %entry 125 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha 126 ; CHECK-NEXT: cntlzw r3, r3 127 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) 128 ; CHECK-NEXT: srwi r3, r3, 5 129 ; CHECK-NEXT: neg r3, r3 130 ; CHECK-NEXT: stb r3, 0(r4) 131 ; CHECK-NEXT: blr 132 entry: 133 %cmp = icmp eq i8 %a, 0 134 %conv2 = sext i1 %cmp to i8 135 store i8 %conv2, i8* @glob, align 1 136 ret void 137 } 138
