1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 7 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8 9 @glob = common local_unnamed_addr global i64 0, align 8 10 11 ; Function Attrs: norecurse nounwind readnone 12 define i64 @test_llequll(i64 %a, i64 %b) { 13 ; CHECK-LABEL: test_llequll: 14 ; CHECK: # %bb.0: # %entry 15 ; CHECK-NEXT: xor r3, r3, r4 16 ; CHECK-NEXT: cntlzd r3, r3 17 ; CHECK-NEXT: rldicl r3, r3, 58, 63 18 ; CHECK-NEXT: blr 19 entry: 20 %cmp = icmp eq i64 %a, %b 21 %conv1 = zext i1 %cmp to i64 22 ret i64 %conv1 23 } 24 25 ; Function Attrs: norecurse nounwind readnone 26 define i64 @test_llequll_sext(i64 %a, i64 %b) { 27 ; CHECK-LABEL: test_llequll_sext: 28 ; CHECK: # %bb.0: # %entry 29 ; CHECK-NEXT: xor r3, r3, r4 30 ; CHECK-NEXT: addic r3, r3, -1 31 ; CHECK-NEXT: subfe r3, r3, r3 32 ; CHECK-NEXT: blr 33 entry: 34 %cmp = icmp eq i64 %a, %b 35 %conv1 = sext i1 %cmp to i64 36 ret i64 %conv1 37 } 38 39 ; Function Attrs: norecurse nounwind readnone 40 define i64 @test_llequll_z(i64 %a) { 41 ; CHECK-LABEL: test_llequll_z: 42 ; CHECK: # %bb.0: # %entry 43 ; CHECK-NEXT: cntlzd r3, r3 44 ; CHECK-NEXT: rldicl r3, r3, 58, 63 45 ; CHECK-NEXT: blr 46 entry: 47 %cmp = icmp eq i64 %a, 0 48 %conv1 = zext i1 %cmp to i64 49 ret i64 %conv1 50 } 51 52 ; Function Attrs: norecurse nounwind readnone 53 define i64 @test_llequll_sext_z(i64 %a) { 54 ; CHECK-LABEL: test_llequll_sext_z: 55 ; CHECK: # %bb.0: # %entry 56 ; CHECK-NEXT: addic r3, r3, -1 57 ; CHECK-NEXT: subfe r3, r3, r3 58 ; CHECK-NEXT: blr 59 entry: 60 %cmp = icmp eq i64 %a, 0 61 %conv1 = sext i1 %cmp to i64 62 ret i64 %conv1 63 } 64 65 ; Function Attrs: norecurse nounwind 66 define void @test_llequll_store(i64 %a, i64 %b) { 67 ; CHECK-LABEL: test_llequll_store: 68 ; CHECK: # %bb.0: # %entry 69 ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha 70 ; CHECK-NEXT: xor r3, r3, r4 71 ; CHECK-NEXT: ld r4, .LC0@toc@l(r5) 72 ; CHECK-NEXT: cntlzd r3, r3 73 ; CHECK-NEXT: rldicl r3, r3, 58, 63 74 ; CHECK-NEXT: std r3, 0(r4) 75 ; CHECK-NEXT: blr 76 entry: 77 %cmp = icmp eq i64 %a, %b 78 %conv1 = zext i1 %cmp to i64 79 store i64 %conv1, i64* @glob, align 8 80 ret void 81 } 82 83 ; Function Attrs: norecurse nounwind 84 define void @test_llequll_sext_store(i64 %a, i64 %b) { 85 ; CHECK-LABEL: test_llequll_sext_store: 86 ; CHECK: # %bb.0: # %entry 87 ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha 88 ; CHECK-NEXT: xor r3, r3, r4 89 ; CHECK-NEXT: ld r4, .LC0@toc@l(r5) 90 ; CHECK-NEXT: addic r3, r3, -1 91 ; CHECK-NEXT: subfe r3, r3, r3 92 ; CHECK-NEXT: std r3, 0(r4) 93 ; CHECK-NEXT: blr 94 entry: 95 %cmp = icmp eq i64 %a, %b 96 %conv1 = sext i1 %cmp to i64 97 store i64 %conv1, i64* @glob, align 8 98 ret void 99 } 100 101 ; Function Attrs: norecurse nounwind 102 define void @test_llequll_z_store(i64 %a) { 103 ; CHECK-LABEL: test_llequll_z_store: 104 ; CHECK: # %bb.0: # %entry 105 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha 106 ; CHECK-NEXT: cntlzd r3, r3 107 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) 108 ; CHECK-NEXT: rldicl r3, r3, 58, 63 109 ; CHECK-NEXT: std r3, 0(r4) 110 ; CHECK-NEXT: blr 111 entry: 112 %cmp = icmp eq i64 %a, 0 113 %conv1 = zext i1 %cmp to i64 114 store i64 %conv1, i64* @glob, align 8 115 ret void 116 } 117 118 ; Function Attrs: norecurse nounwind 119 define void @test_llequll_sext_z_store(i64 %a) { 120 ; CHECK-LABEL: test_llequll_sext_z_store: 121 ; CHECK: # %bb.0: # %entry 122 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha 123 ; CHECK-NEXT: addic r3, r3, -1 124 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) 125 ; CHECK-NEXT: subfe r3, r3, r3 126 ; CHECK-NEXT: std r3, 0(r4) 127 ; CHECK-NEXT: blr 128 entry: 129 %cmp = icmp eq i64 %a, 0 130 %conv1 = sext i1 %cmp to i64 131 store i64 %conv1, i64* @glob, align 8 132 ret void 133 } 134
