1 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 2 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 3 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 4 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 5 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 6 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 7 8 @glob = common local_unnamed_addr global i8 0, align 1 9 10 ; Function Attrs: norecurse nounwind readnone 11 define i64 @test_llgtuc(i8 zeroext %a, i8 zeroext %b) { 12 ; CHECK-LABEL: test_llgtuc: 13 ; CHECK: sub [[REG:r[0-9]+]], r4, r3 14 ; CHECK: rldicl r3, [[REG]], 1, 63 15 ; CHECK-NEXT: blr 16 entry: 17 %cmp = icmp ugt i8 %a, %b 18 %conv3 = zext i1 %cmp to i64 19 ret i64 %conv3 20 } 21 22 ; Function Attrs: norecurse nounwind readnone 23 define i64 @test_llgtuc_sext(i8 zeroext %a, i8 zeroext %b) { 24 ; CHECK-LABEL: test_llgtuc_sext: 25 ; CHECK: sub [[REG:r[0-9]+]], r4, r3 26 ; CHECK: sradi r3, [[REG]], 63 27 ; CHECK-NEXT: blr 28 entry: 29 %cmp = icmp ugt i8 %a, %b 30 %conv3 = sext i1 %cmp to i64 31 ret i64 %conv3 32 } 33 34 ; Function Attrs: norecurse nounwind readnone 35 define i64 @test_llgtuc_z(i8 zeroext %a) { 36 ; CHECK-LABEL: test_llgtuc_z: 37 ; CHECK: cntlzw r3, r3 38 ; CHECK: srwi r3, r3, 5 39 ; CHECK: xori r3, r3, 1 40 ; CHECK-NEXT: blr 41 entry: 42 %cmp = icmp ne i8 %a, 0 43 %conv2 = zext i1 %cmp to i64 44 ret i64 %conv2 45 } 46 47 ; Function Attrs: norecurse nounwind readnone 48 define i64 @test_llgtuc_sext_z(i8 zeroext %a) { 49 ; CHECK-LABEL: test_llgtuc_sext_z: 50 ; CHECK: cntlzw r3, r3 51 ; CHECK: srwi r3, r3, 5 52 ; CHECK: xori r3, r3, 1 53 ; CHECK: neg r3, r3 54 ; CHECK-NEXT: blr 55 entry: 56 %cmp = icmp ne i8 %a, 0 57 %conv2 = sext i1 %cmp to i64 58 ret i64 %conv2 59 } 60 61 ; Function Attrs: norecurse nounwind 62 define void @test_llgtuc_store(i8 zeroext %a, i8 zeroext %b) { 63 ; CHECK-LABEL: test_llgtuc_store: 64 ; CHECK: sub [[REG:r[0-9]+]], r4, r3 65 ; CHECK: rldicl {{r[0-9]+}}, [[REG]], 1, 63 66 entry: 67 %cmp = icmp ugt i8 %a, %b 68 %conv3 = zext i1 %cmp to i8 69 store i8 %conv3, i8* @glob, align 1 70 ret void 71 } 72 73 ; Function Attrs: norecurse nounwind 74 define void @test_llgtuc_sext_store(i8 zeroext %a, i8 zeroext %b) { 75 ; CHECK-LABEL: test_llgtuc_sext_store: 76 ; CHECK: sub [[REG:r[0-9]+]], r4, r3 77 ; CHECK: sradi {{r[0-9]+}}, [[REG]], 63 78 entry: 79 %cmp = icmp ugt i8 %a, %b 80 %conv3 = sext i1 %cmp to i8 81 store i8 %conv3, i8* @glob, align 1 82 ret void 83 } 84 85 ; Function Attrs: norecurse nounwind 86 define void @test_llgtuc_z_store(i8 zeroext %a) { 87 ; CHECK-LABEL: test_llgtuc_z_store: 88 ; CHECK: cntlzw r3, r3 89 ; CHECK: srwi r3, r3, 5 90 ; CHECK: xori r3, r3, 1 91 ; CHECK: stb r3, 0(r4) 92 ; CHECK-NEXT: blr 93 entry: 94 %cmp = icmp ne i8 %a, 0 95 %conv2 = zext i1 %cmp to i8 96 store i8 %conv2, i8* @glob, align 1 97 ret void 98 } 99 100 ; Function Attrs: norecurse nounwind 101 define void @test_llgtuc_sext_z_store(i8 zeroext %a) { 102 ; CHECK-LABEL: test_llgtuc_sext_z_store: 103 ; CHECK: cntlzw r3, r3 104 ; CHECK: srwi r3, r3, 5 105 ; CHECK: xori r3, r3, 1 106 ; CHECK: neg r3, r3 107 ; CHECK: stb r3, 0(r4) 108 ; CHECK-NEXT: blr 109 entry: 110 %cmp = icmp ne i8 %a, 0 111 %conv2 = sext i1 %cmp to i8 112 store i8 %conv2, i8* @glob, align 1 113 ret void 114 } 115
