1 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s 2 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s 3 4 ; Check the vabsd* instructions that were added in PowerISA V3.0 5 6 ; Function Attrs: nounwind readnone 7 declare <16 x i8> @llvm.ppc.altivec.vabsdub(<16 x i8>, <16 x i8>) 8 9 ; Function Attrs: nounwind readnone 10 declare <8 x i16> @llvm.ppc.altivec.vabsduh(<8 x i16>, <8 x i16>) 11 12 ; Function Attrs: nounwind readnone 13 declare <4 x i32> @llvm.ppc.altivec.vabsduw(<4 x i32>, <4 x i32>) 14 15 define <16 x i8> @test_byte(<16 x i8> %a, <16 x i8> %b) { 16 entry: 17 %res = tail call <16 x i8> @llvm.ppc.altivec.vabsdub(<16 x i8> %a, <16 x i8> %b) 18 ret <16 x i8> %res 19 ; CHECK-LABEL: @test_byte 20 ; CHECK: vabsdub 2, 2, 3 21 ; CHECK: blr 22 } 23 24 define <8 x i16> @test_half(<8 x i16> %a, <8 x i16> %b) { 25 entry: 26 %res = tail call <8 x i16> @llvm.ppc.altivec.vabsduh(<8 x i16> %a, <8 x i16> %b) 27 ret <8 x i16> %res 28 ; CHECK-LABEL: @test_half 29 ; CHECK: vabsduh 2, 2, 3 30 ; CHECK: blr 31 } 32 33 define <4 x i32> @test_word(<4 x i32> %a, <4 x i32> %b) { 34 entry: 35 %res = tail call <4 x i32> @llvm.ppc.altivec.vabsduw(<4 x i32> %a, <4 x i32> %b) 36 ret <4 x i32> %res 37 ; CHECK-LABEL: @test_word 38 ; CHECK: vabsduw 2, 2, 3 39 ; CHECK: blr 40 } 41
