1 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s 2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s 3 4 define <8 x i16> @testXXBRH(<8 x i16> %a) { 5 ; CHECK-LABEL: testXXBRH: 6 ; CHECK: # %bb.0: # %entry 7 ; CHECK-NEXT: xxbrh 34, 34 8 ; CHECK-NEXT: blr 9 10 entry: 11 %0 = bitcast <8 x i16> %a to <16 x i8> 12 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14> 13 %2 = bitcast <16 x i8> %1 to <8 x i16> 14 ret <8 x i16> %2 15 } 16 17 define <4 x i32> @testXXBRW(<4 x i32> %a) { 18 ; CHECK-LABEL: testXXBRW: 19 ; CHECK: # %bb.0: # %entry 20 ; CHECK-NEXT: xxbrw 34, 34 21 ; CHECK-NEXT: blr 22 23 entry: 24 %0 = bitcast <4 x i32> %a to <16 x i8> 25 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12> 26 %2 = bitcast <16 x i8> %1 to <4 x i32> 27 ret <4 x i32> %2 28 } 29 30 define <2 x double> @testXXBRD(<2 x double> %a) { 31 ; CHECK-LABEL: testXXBRD: 32 ; CHECK: # %bb.0: # %entry 33 ; CHECK-NEXT: xxbrd 34, 34 34 ; CHECK-NEXT: blr 35 36 entry: 37 %0 = bitcast <2 x double> %a to <16 x i8> 38 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8> 39 %2 = bitcast <16 x i8> %1 to <2 x double> 40 ret <2 x double> %2 41 } 42 43 define <1 x i128> @testXXBRQ(<1 x i128> %a) { 44 ; CHECK-LABEL: testXXBRQ: 45 ; CHECK: # %bb.0: # %entry 46 ; CHECK-NEXT: xxbrq 34, 34 47 ; CHECK-NEXT: blr 48 49 entry: 50 %0 = bitcast <1 x i128> %a to <16 x i8> 51 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 52 %2 = bitcast <16 x i8> %1 to <1 x i128> 53 ret <1 x i128> %2 54 } 55
