1 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s 2 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s \ 3 ; RUN: --check-prefix=CHECK-BE 4 5 define <4 x float> @test0f(<4 x float> %a) { 6 entry: 7 %0 = bitcast <4 x float> %a to <16 x i8> 8 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 9 %2 = bitcast <16 x i8> %1 to <4 x float> 10 ret <4 x float> %2 11 ; CHECK-LABEL: test0f 12 ; CHECK xxspltw: 34, 34, 3 13 ; CHECK-BE-LABEL: test0f 14 ; CHECK-BE: xxspltw 34, 34, 0 15 } 16 17 define <4 x float> @test1f(<4 x float> %a) { 18 entry: 19 %0 = bitcast <4 x float> %a to <16 x i8> 20 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7> 21 %2 = bitcast <16 x i8> %1 to <4 x float> 22 ret <4 x float> %2 23 ; CHECK-LABEL: test1f 24 ; CHECK xxspltw: 34, 34, 2 25 ; CHECK-BE-LABEL: test1f 26 ; CHECK-BE: xxspltw 34, 34, 1 27 } 28 29 define <4 x float> @test2f(<4 x float> %a) { 30 entry: 31 %0 = bitcast <4 x float> %a to <16 x i8> 32 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11> 33 %2 = bitcast <16 x i8> %1 to <4 x float> 34 ret <4 x float> %2 35 ; CHECK-LABEL: test2f 36 ; CHECK xxspltw: 34, 34, 1 37 ; CHECK-LABEL: test2f 38 ; CHECK-BE: xxspltw 34, 34, 2 39 } 40 41 define <4 x float> @test3f(<4 x float> %a) { 42 entry: 43 %0 = bitcast <4 x float> %a to <16 x i8> 44 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15> 45 %2 = bitcast <16 x i8> %1 to <4 x float> 46 ret <4 x float> %2 47 ; CHECK-LABEL: test3f 48 ; CHECK xxspltw: 34, 34, 0 49 ; CHECK-BE-LABEL: test3f 50 ; CHECK-BE: xxspltw 34, 34, 3 51 } 52 53 define <4 x i32> @test0si(<4 x i32> %a) { 54 entry: 55 %0 = bitcast <4 x i32> %a to <16 x i8> 56 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 57 %2 = bitcast <16 x i8> %1 to <4 x i32> 58 ret <4 x i32> %2 59 ; CHECK-LABEL: test0si 60 ; CHECK xxspltw: 34, 34, 3 61 ; CHECK-BE-LABEL: test0si 62 ; CHECK-BE: xxspltw 34, 34, 0 63 } 64 65 define <4 x i32> @test1si(<4 x i32> %a) { 66 entry: 67 %0 = bitcast <4 x i32> %a to <16 x i8> 68 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7> 69 %2 = bitcast <16 x i8> %1 to <4 x i32> 70 ret <4 x i32> %2 71 ; CHECK-LABEL: test1si 72 ; CHECK xxspltw: 34, 34, 2 73 ; CHECK-BE-LABEL: test1si 74 ; CHECK-BE: xxspltw 34, 34, 1 75 } 76 77 define <4 x i32> @test2si(<4 x i32> %a) { 78 entry: 79 %0 = bitcast <4 x i32> %a to <16 x i8> 80 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11> 81 %2 = bitcast <16 x i8> %1 to <4 x i32> 82 ret <4 x i32> %2 83 ; CHECK-LABEL: test2si 84 ; CHECK xxspltw: 34, 34, 1 85 ; CHECK-BE-LABEL: test2si 86 ; CHECK-BE: xxspltw 34, 34, 2 87 } 88 89 define <4 x i32> @test3si(<4 x i32> %a) { 90 entry: 91 %0 = bitcast <4 x i32> %a to <16 x i8> 92 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15> 93 %2 = bitcast <16 x i8> %1 to <4 x i32> 94 ret <4 x i32> %2 95 ; CHECK-LABEL: test3si 96 ; CHECK xxspltw: 34, 34, 0 97 ; CHECK-BE-LABEL: test3si 98 ; CHECK-BE: xxspltw 34, 34, 3 99 } 100 101 define <4 x i32> @test0ui(<4 x i32> %a) { 102 entry: 103 %0 = bitcast <4 x i32> %a to <16 x i8> 104 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 105 %2 = bitcast <16 x i8> %1 to <4 x i32> 106 ret <4 x i32> %2 107 ; CHECK-LABEL: test0ui 108 ; CHECK xxspltw: 34, 34, 3 109 ; CHECK-BE-LABEL: test0ui 110 ; CHECK-BE: xxspltw 34, 34, 0 111 } 112 113 define <4 x i32> @test1ui(<4 x i32> %a) { 114 entry: 115 %0 = bitcast <4 x i32> %a to <16 x i8> 116 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7> 117 %2 = bitcast <16 x i8> %1 to <4 x i32> 118 ret <4 x i32> %2 119 ; CHECK-LABEL: test1ui 120 ; CHECK xxspltw: 34, 34, 2 121 ; CHECK-BE-LABEL: test1ui 122 ; CHECK-BE: xxspltw 34, 34, 1 123 } 124 125 define <4 x i32> @test2ui(<4 x i32> %a) { 126 entry: 127 %0 = bitcast <4 x i32> %a to <16 x i8> 128 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11> 129 %2 = bitcast <16 x i8> %1 to <4 x i32> 130 ret <4 x i32> %2 131 ; CHECK-LABEL: test2ui 132 ; CHECK xxspltw: 34, 34, 1 133 ; CHECK-BE-LABEL: test2ui 134 ; CHECK-BE: xxspltw 34, 34, 2 135 } 136 137 define <4 x i32> @test3ui(<4 x i32> %a) { 138 entry: 139 %0 = bitcast <4 x i32> %a to <16 x i8> 140 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15> 141 %2 = bitcast <16 x i8> %1 to <4 x i32> 142 ret <4 x i32> %2 143 ; CHECK-LABEL: test3ui 144 ; CHECK xxspltw: 34, 34, 0 145 ; CHECK-BE-LABEL: test3ui 146 ; CHECK-BE: xxspltw 34, 34, 3 147 } 148
