1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -mtriple=thumbv6-eabi %s -o - | FileCheck %s 3 4 define i32 @test1(i32 %x) { 5 ; CHECK-LABEL: test1: 6 ; CHECK: @ %bb.0: @ %entry 7 ; CHECK-NEXT: lsls r0, r0, #20 8 ; CHECK-NEXT: lsrs r0, r0, #22 9 ; CHECK-NEXT: bx lr 10 entry: 11 %0 = lshr i32 %x, 2 12 %shr = and i32 %0, 1023 13 ret i32 %shr 14 } 15 16 define i32 @test2(i32 %x) { 17 ; CHECK-LABEL: test2: 18 ; CHECK: @ %bb.0: @ %entry 19 ; CHECK-NEXT: lsrs r1, r0, #2 20 ; CHECK-NEXT: ldr r0, .LCPI1_0 21 ; CHECK-NEXT: ands r0, r1 22 ; CHECK-NEXT: bx lr 23 ; CHECK-NEXT: .p2align 2 24 ; CHECK-NEXT: @ %bb.1: 25 ; CHECK-NEXT: .LCPI1_0: 26 ; CHECK-NEXT: .long 1022 @ 0x3fe 27 entry: 28 %0 = lshr i32 %x, 2 29 %shr = and i32 %0, 1022 30 ret i32 %shr 31 } 32 33 define i32 @test3(i32 %x) { 34 ; CHECK-LABEL: test3: 35 ; CHECK: @ %bb.0: @ %entry 36 ; CHECK-NEXT: lsrs r0, r0, #2 37 ; CHECK-NEXT: uxtb r0, r0 38 ; CHECK-NEXT: bx lr 39 entry: 40 %0 = lshr i32 %x, 2 41 %shr = and i32 %0, 255 42 ret i32 %shr 43 } 44 45 define i32 @test4(i32 %x) { 46 ; CHECK-LABEL: test4: 47 ; CHECK: @ %bb.0: @ %entry 48 ; CHECK-NEXT: lsls r0, r0, #4 49 ; CHECK-NEXT: movs r1, #127 50 ; CHECK-NEXT: bics r0, r1 51 ; CHECK-NEXT: bx lr 52 entry: 53 %0 = shl i32 %x, 4 54 %shr = and i32 %0, -128 55 ret i32 %shr 56 } 57 58 define i32 @test5(i32 %x) { 59 ; CHECK-LABEL: test5: 60 ; CHECK: @ %bb.0: @ %entry 61 ; CHECK-NEXT: lsls r0, r0, #31 62 ; CHECK-NEXT: lsrs r0, r0, #2 63 ; CHECK-NEXT: bx lr 64 entry: 65 %0 = shl i32 %x, 29 66 %shr = and i32 %0, 536870912 67 ret i32 %shr 68 } 69 70 define i32 @test6(i32 %x) { 71 ; CHECK-LABEL: test6: 72 ; CHECK: @ %bb.0: @ %entry 73 ; CHECK-NEXT: movs r1, #5 74 ; CHECK-NEXT: lsls r1, r1, #29 75 ; CHECK-NEXT: lsls r0, r0, #29 76 ; CHECK-NEXT: ands r0, r1 77 ; CHECK-NEXT: bx lr 78 entry: 79 %0 = shl i32 %x, 29 80 %shr = and i32 %0, 2684354560 81 ret i32 %shr 82 } 83 84 define i32 @test7(i32 %x) { 85 ; CHECK-LABEL: test7: 86 ; CHECK: @ %bb.0: @ %entry 87 ; CHECK-NEXT: lsrs r1, r0, #29 88 ; CHECK-NEXT: movs r0, #4 89 ; CHECK-NEXT: ands r0, r1 90 ; CHECK-NEXT: bx lr 91 entry: 92 %0 = lshr i32 %x, 29 93 %shr = and i32 %0, 4 94 ret i32 %shr 95 } 96 97 define i32 @test8(i32 %x) { 98 ; CHECK-LABEL: test8: 99 ; CHECK: @ %bb.0: @ %entry 100 ; CHECK-NEXT: lsrs r1, r0, #29 101 ; CHECK-NEXT: movs r0, #5 102 ; CHECK-NEXT: ands r0, r1 103 ; CHECK-NEXT: bx lr 104 entry: 105 %0 = lshr i32 %x, 29 106 %shr = and i32 %0, 5 107 ret i32 %shr 108 } 109 110 define i32 @test9(i32 %x) { 111 ; CHECK-LABEL: test9: 112 ; CHECK: @ %bb.0: @ %entry 113 ; CHECK-NEXT: lsrs r1, r0, #2 114 ; CHECK-NEXT: ldr r0, .LCPI8_0 115 ; CHECK-NEXT: ands r0, r1 116 ; CHECK-NEXT: bx lr 117 ; CHECK-NEXT: .p2align 2 118 ; CHECK-NEXT: @ %bb.1: 119 ; CHECK-NEXT: .LCPI8_0: 120 ; CHECK-NEXT: .long 1073741822 @ 0x3ffffffe 121 entry: 122 %and = lshr i32 %x, 2 123 %shr = and i32 %and, 1073741822 124 ret i32 %shr 125 } 126
