1 ; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s --check-prefix=CHECK-NO-DSP 2 ; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m4 %s -o - | FileCheck %s --check-prefix=CHECK-DSP 3 ; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK-DSP 4 ; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP 5 ; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefix=CHECK-DSP 6 7 define i32 @test1(i16 zeroext %z) nounwind { 8 ; CHECK-LABEL: test1: 9 ; CHECK-DSP: sxth 10 ; CHECK-NO-DSP: sxth 11 %r = sext i16 %z to i32 12 ret i32 %r 13 } 14 15 define i32 @test2(i8 zeroext %z) nounwind { 16 ; CHECK-LABEL: test2: 17 ; CHECK-DSP: sxtb 18 ; CHECK-NO-DSP: sxtb 19 %r = sext i8 %z to i32 20 ret i32 %r 21 } 22 23 define i32 @test3(i16 signext %z) nounwind { 24 ; CHECK-LABEL: test3: 25 ; CHECK-DSP: uxth 26 ; CHECK-NO-DSP: uxth 27 %r = zext i16 %z to i32 28 ret i32 %r 29 } 30 31 define i32 @test4(i8 signext %z) nounwind { 32 ; CHECK-LABEL: test4: 33 ; CHECK-DSP: uxtb 34 ; CHECK-NO-DSP: uxtb 35 %r = zext i8 %z to i32 36 ret i32 %r 37 } 38 39 define i32 @test5(i32 %a, i8 %b) { 40 ; CHECK-LABEL: test5: 41 ; CHECK-DSP: sxtab r0, r0, r1 42 ; CHECK-NO-DSP-NOT: sxtab 43 %sext = sext i8 %b to i32 44 %add = add i32 %a, %sext 45 ret i32 %add 46 } 47 48 define i32 @test6(i32 %a, i32 %b) { 49 ; CHECK-LABEL: test6: 50 ; CHECK-DSP: sxtab r0, r0, r1 51 ; CHECK-NO-DSP-NOT: sxtab 52 %shl = shl i32 %b, 24 53 %ashr = ashr i32 %shl, 24 54 %add = add i32 %a, %ashr 55 ret i32 %add 56 } 57 58 define i32 @test7(i32 %a, i16 %b) { 59 ; CHECK-LABEL: test7: 60 ; CHECK-DSP: sxtah r0, r0, r1 61 ; CHECK-NO-DSPNOT: sxtah 62 %sext = sext i16 %b to i32 63 %add = add i32 %a, %sext 64 ret i32 %add 65 } 66 67 define i32 @test8(i32 %a, i32 %b) { 68 ; CHECK-LABEL: test8: 69 ; CHECK-DSP: sxtah r0, r0, r1 70 ; CHECK-NO-DSP-NOT: sxtah 71 %shl = shl i32 %b, 16 72 %ashr = ashr i32 %shl, 16 73 %add = add i32 %a, %ashr 74 ret i32 %add 75 } 76 77 define i32 @test9(i32 %a, i8 %b) { 78 ; CHECK-LABEL: test9: 79 ; CHECK-DSP: uxtab r0, r0, r1 80 ; CHECK-NO-DSP-NOT: uxtab 81 %zext = zext i8 %b to i32 82 %add = add i32 %a, %zext 83 ret i32 %add 84 } 85 86 define i32 @test10(i32 %a, i32 %b) { 87 ;CHECK-LABEL: test10: 88 ;CHECK-DSP: uxtab r0, r0, r1 89 ;CHECK-NO-DSP-NOT: uxtab 90 %and = and i32 %b, 255 91 %add = add i32 %a, %and 92 ret i32 %add 93 } 94 95 define i32 @test11(i32 %a, i16 %b) { 96 ; CHECK-LABEL: test11: 97 ; CHECK-DSP: uxtah r0, r0, r1 98 ; CHECK-NO-DSP-NOT: uxtah 99 %zext = zext i16 %b to i32 100 %add = add i32 %a, %zext 101 ret i32 %add 102 } 103 104 define i32 @test12(i32 %a, i32 %b) { 105 ;CHECK-LABEL: test12: 106 ;CHECK-DSP: uxtah r0, r0, r1 107 ;CHECK-NO-DSP-NOT: uxtah 108 %and = and i32 %b, 65535 109 %add = add i32 %a, %and 110 ret i32 %add 111 } 112 113
