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      1 ; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
      2 
      3 ; These tests would be improved by 'movs r0, #0' being rematerialized below the
      4 ; tst as 'mov.w r0, #0'.
      5 
      6 ; 0x000000bb = 187
      7 define i32 @f2(i32 %a) {
      8     %tmp = and i32 %a, 187
      9     %tmp1 = icmp eq i32 0, %tmp
     10     %ret = select i1 %tmp1, i32 42, i32 24
     11     ret i32 %ret
     12 }
     13 ; CHECK-LABEL: f2:
     14 ; CHECK: 	tst.w	{{.*}}, #187
     15 
     16 ; 0x00aa00aa = 11141290
     17 define i32 @f3(i32 %a) {
     18     %tmp = and i32 %a, 11141290 
     19     %tmp1 = icmp eq i32 %tmp, 0
     20     %ret = select i1 %tmp1, i32 42, i32 24
     21     ret i32 %ret
     22 }
     23 ; CHECK-LABEL: f3:
     24 ; CHECK: 	tst.w	{{.*}}, #11141290
     25 
     26 ; 0xcc00cc00 = 3422604288
     27 define i32 @f6(i32 %a) {
     28     %tmp = and i32 %a, 3422604288
     29     %tmp1 = icmp eq i32 0, %tmp
     30     %ret = select i1 %tmp1, i32 42, i32 24
     31     ret i32 %ret
     32 }
     33 ; CHECK-LABEL: f6:
     34 ; CHECK: 	tst.w	{{.*}}, #-872363008
     35 
     36 ; 0xdddddddd = 3722304989
     37 define i32 @f7(i32 %a) {
     38     %tmp = and i32 %a, 3722304989
     39     %tmp1 = icmp eq i32 %tmp, 0
     40     %ret = select i1 %tmp1, i32 42, i32 24
     41     ret i32 %ret
     42 }
     43 ; CHECK-LABEL: f7:
     44 ; CHECK: 	tst.w	{{.*}}, #-572662307
     45 
     46 ; 0x00110000 = 1114112
     47 define i32 @f10(i32 %a) {
     48     %tmp = and i32 %a, 1114112
     49     %tmp1 = icmp eq i32 0, %tmp
     50     %ret = select i1 %tmp1, i32 42, i32 24
     51     ret i32 %ret
     52 }
     53 ; CHECK-LABEL: f10:
     54 ; CHECK: 	tst.w	{{.*}}, #1114112
     55 
     56 ; 0x000000bb = 187
     57 define i1 @f12(i32 %a) {
     58     %tmp = and i32 %a, 187
     59     %tmp1 = icmp eq i32 0, %tmp
     60     ret i1 %tmp1
     61 }
     62 ; CHECK-LABEL: f12:
     63 ; CHECK: 	  and r0, r0, #187
     64 ; CHECK-NEXT: clz r0, r0
     65 ; CHECK-NEXT: lsrs r0, r0, #5
     66 
     67 ; 0x00aa00aa = 11141290
     68 define i1 @f13(i32 %a) {
     69     %tmp = and i32 %a, 11141290
     70     %tmp1 = icmp eq i32 %tmp, 0
     71     ret i1 %tmp1
     72 }
     73 ; CHECK-LABEL: f13:
     74 ; CHECK: 	  and r0, r0, #11141290
     75 ; CHECK-NEXT: clz r0, r0
     76 ; CHECK-NEXT: lsrs r0, r0, #5
     77 
     78 ; 0xcc00cc00 = 3422604288
     79 define i1 @f16(i32 %a) {
     80     %tmp = and i32 %a, 3422604288
     81     %tmp1 = icmp eq i32 0, %tmp
     82     ret i1 %tmp1
     83 }
     84 ; CHECK-LABEL: f16:
     85 ; CHECK: 	  and r0, r0, #-872363008
     86 ; CHECK-NEXT: clz r0, r0
     87 ; CHECK-NEXT: lsrs r0, r0, #5
     88 
     89 ; 0xdddddddd = 3722304989
     90 define i1 @f17(i32 %a) {
     91     %tmp = and i32 %a, 3722304989
     92     %tmp1 = icmp eq i32 %tmp, 0
     93     ret i1 %tmp1
     94 }
     95 ; CHECK-LABEL: f17:
     96 ; CHECK: 	  bic r0, r0, #572662306
     97 ; CHECK-NEXT: clz r0, r0
     98 ; CHECK-NEXT: lsrs r0, r0, #5
     99 
    100 ; 0x00110000 = 1114112
    101 define i1 @f18(i32 %a) {
    102     %tmp = and i32 %a, 1114112
    103     %tmp1 = icmp eq i32 0, %tmp
    104     ret i1 %tmp1
    105 }
    106 ; CHECK-LABEL: f18:
    107 ; CHECK: 	  and r0, r0, #1114112
    108 ; CHECK-NEXT: clz r0, r0
    109 ; CHECK-NEXT: lsrs r0, r0, #5
    110 
    111