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      1 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
      2 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128
      3 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=-simd128 | FileCheck %s --check-prefixes CHECK,NO-SIMD128
      4 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=-simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,NO-SIMD128
      5 
      6 ; Test that basic SIMD128 arithmetic operations assemble as expected.
      7 
      8 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
      9 target triple = "wasm32-unknown-unknown"
     10 
     11 declare i32 @llvm.ctlz.i32(i32, i1)
     12 declare i32 @llvm.cttz.i32(i32, i1)
     13 declare i32 @llvm.ctpop.i32(i32)
     14 
     15 ; ==============================================================================
     16 ; 16 x i8
     17 ; ==============================================================================
     18 ; CHECK-LABEL: add_v16i8
     19 ; NO-SIMD128-NOT: i8x16
     20 ; SIMD128: .param v128, v128{{$}}
     21 ; SIMD128: .result v128{{$}}
     22 ; SIMD128: i8x16.add $push0=, $0, $1{{$}}
     23 ; SIMD128: return $pop0{{$}}
     24 define <16 x i8> @add_v16i8(<16 x i8> %x, <16 x i8> %y) {
     25   %a = add <16 x i8> %x, %y
     26   ret <16 x i8> %a
     27 }
     28 
     29 ; CHECK-LABEL: sub_v16i8
     30 ; NO-SIMD128-NOT: i8x16
     31 ; SIMD128: .param v128, v128{{$}}
     32 ; SIMD128: .result v128{{$}}
     33 ; SIMD128: i8x16.sub $push0=, $0, $1{{$}}
     34 ; SIMD128: return $pop0{{$}}
     35 define <16 x i8> @sub_v16i8(<16 x i8> %x, <16 x i8> %y) {
     36   %a = sub <16 x i8> %x, %y
     37   ret <16 x i8> %a
     38 }
     39 
     40 ; CHECK-LABEL: mul_v16i8
     41 ; NO-SIMD128-NOT: i8x16
     42 ; SIMD128: .param v128, v128{{$}}
     43 ; SIMD128: .result v128{{$}}
     44 ; SIMD128: i8x16.mul $push0=, $0, $1{{$}}
     45 ; SIMD128: return $pop0{{$}}
     46 define <16 x i8> @mul_v16i8(<16 x i8> %x, <16 x i8> %y) {
     47   %a = mul <16 x i8> %x, %y
     48   ret <16 x i8> %a
     49 }
     50 
     51 ; ==============================================================================
     52 ; 8 x i16
     53 ; ==============================================================================
     54 ; CHECK-LABEL: add_v8i16
     55 ; NO-SIMD128-NOT: i16x8
     56 ; SIMD128: .param v128, v128{{$}}
     57 ; SIMD128: .result v128{{$}}
     58 ; SIMD128: i16x8.add $push0=, $0, $1{{$}}
     59 ; SIMD128: return $pop0{{$}}
     60 define <8 x i16> @add_v8i16(<8 x i16> %x, <8 x i16> %y) {
     61   %a = add <8 x i16> %x, %y
     62   ret <8 x i16> %a
     63 }
     64 
     65 ; CHECK-LABEL: sub_v8i16
     66 ; NO-SIMD128-NOT: i16x8
     67 ; SIMD128: .param v128, v128{{$}}
     68 ; SIMD128: .result v128{{$}}
     69 ; SIMD128: i16x8.sub $push0=, $0, $1{{$}}
     70 ; SIMD128: return $pop0{{$}}
     71 define <8 x i16> @sub_v8i16(<8 x i16> %x, <8 x i16> %y) {
     72   %a = sub <8 x i16> %x, %y
     73   ret <8 x i16> %a
     74 }
     75 
     76 ; CHECK-LABEL: mul_v8i16
     77 ; NO-SIMD128-NOT: i16x8
     78 ; SIMD128: .param v128, v128{{$}}
     79 ; SIMD128: .result v128{{$}}
     80 ; SIMD128: i16x8.mul $push0=, $0, $1{{$}}
     81 ; SIMD128: return $pop0{{$}}
     82 define <8 x i16> @mul_v8i16(<8 x i16> %x, <8 x i16> %y) {
     83   %a = mul <8 x i16> %x, %y
     84   ret <8 x i16> %a
     85 }
     86 
     87 ; ==============================================================================
     88 ; 4 x i32
     89 ; ==============================================================================
     90 ; CHECK-LABEL: add_v4i32
     91 ; NO-SIMD128-NOT: i32x4
     92 ; SIMD128: .param v128, v128{{$}}
     93 ; SIMD128: .result v128{{$}}
     94 ; SIMD128: i32x4.add $push0=, $0, $1{{$}}
     95 ; SIMD128: return $pop0{{$}}
     96 define <4 x i32> @add_v4i32(<4 x i32> %x, <4 x i32> %y) {
     97   %a = add <4 x i32> %x, %y
     98   ret <4 x i32> %a
     99 }
    100 
    101 ; CHECK-LABEL: sub_v4i32
    102 ; NO-SIMD128-NOT: i32x4
    103 ; SIMD128: .param v128, v128{{$}}
    104 ; SIMD128: .result v128{{$}}
    105 ; SIMD128: i32x4.sub $push0=, $0, $1{{$}}
    106 ; SIMD128: return $pop0{{$}}
    107 define <4 x i32> @sub_v4i32(<4 x i32> %x, <4 x i32> %y) {
    108   %a = sub <4 x i32> %x, %y
    109   ret <4 x i32> %a
    110 }
    111 
    112 ; CHECK-LABEL: mul_v4i32
    113 ; NO-SIMD128-NOT: i32x4
    114 ; SIMD128: .param v128, v128{{$}}
    115 ; SIMD128: .result v128{{$}}
    116 ; SIMD128: i32x4.mul $push0=, $0, $1{{$}}
    117 ; SIMD128: return $pop0{{$}}
    118 define <4 x i32> @mul_v4i32(<4 x i32> %x, <4 x i32> %y) {
    119   %a = mul <4 x i32> %x, %y
    120   ret <4 x i32> %a
    121 }
    122 
    123 ; ==============================================================================
    124 ; 4 x float
    125 ; ==============================================================================
    126 ; CHECK-LABEL: add_v4f32
    127 ; NO-SIMD128-NOT: f32x4
    128 ; SIMD128: .param v128, v128{{$}}
    129 ; SIMD128: .result v128{{$}}
    130 ; SIMD128: f32x4.add $push0=, $0, $1{{$}}
    131 ; SIMD128: return $pop0{{$}}
    132 define <4 x float> @add_v4f32(<4 x float> %x, <4 x float> %y) {
    133   %a = fadd <4 x float> %x, %y
    134   ret <4 x float> %a
    135 }
    136 
    137 ; CHECK-LABEL: sub_v4f32
    138 ; NO-SIMD128-NOT: f32x4
    139 ; SIMD128: .param v128, v128{{$}}
    140 ; SIMD128: .result v128{{$}}
    141 ; SIMD128: f32x4.sub $push0=, $0, $1{{$}}
    142 ; SIMD128: return $pop0{{$}}
    143 define <4 x float> @sub_v4f32(<4 x float> %x, <4 x float> %y) {
    144   %a = fsub <4 x float> %x, %y
    145   ret <4 x float> %a
    146 }
    147 
    148 ; CHECK-LABEL: mul_v4f32
    149 ; NO-SIMD128-NOT: f32x4
    150 ; SIMD128: .param v128, v128{{$}}
    151 ; SIMD128: .result v128{{$}}
    152 ; SIMD128: f32x4.mul $push0=, $0, $1{{$}}
    153 ; SIMD128: return $pop0{{$}}
    154 define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) {
    155   %a = fmul <4 x float> %x, %y
    156   ret <4 x float> %a
    157 }
    158 
    159