1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 | FileCheck %s 3 4 ; rdar://11314175: SD Scheduler, BuildSchedUnits assert: 5 ; N->getNodeId() == -1 && "Node already inserted! 6 7 define void @func(<4 x float> %a, <16 x i8> %b, <16 x i8> %c, <8 x float> %d, <8 x float> %e, <8 x float>* %f) nounwind ssp { 8 ; CHECK-LABEL: func: 9 ; CHECK: ## %bb.0: 10 ; CHECK-NEXT: vmovdqu 0, %xmm3 11 ; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm3, %ymm0 12 ; CHECK-NEXT: vpalignr {{.*#+}} xmm1 = xmm3[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3] 13 ; CHECK-NEXT: vmovdqu 32, %xmm3 14 ; CHECK-NEXT: vpalignr {{.*#+}} xmm2 = xmm2[4,5,6,7,8,9,10,11,12,13,14,15],xmm3[0,1,2,3] 15 ; CHECK-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1 16 ; CHECK-NEXT: vmulps %ymm0, %ymm0, %ymm0 17 ; CHECK-NEXT: vmulps %ymm1, %ymm1, %ymm1 18 ; CHECK-NEXT: vaddps %ymm1, %ymm0, %ymm0 19 ; CHECK-NEXT: vaddps %ymm0, %ymm0, %ymm0 20 ; CHECK-NEXT: vmulps %xmm0, %xmm0, %xmm0 21 ; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm0[0,1] 22 ; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 23 ; CHECK-NEXT: vaddps %ymm0, %ymm0, %ymm0 24 ; CHECK-NEXT: vhaddps %ymm4, %ymm0, %ymm0 25 ; CHECK-NEXT: vsubps %ymm0, %ymm0, %ymm0 26 ; CHECK-NEXT: vhaddps %ymm0, %ymm1, %ymm0 27 ; CHECK-NEXT: vmovaps %ymm0, (%rdi) 28 ; CHECK-NEXT: vzeroupper 29 ; CHECK-NEXT: retq 30 %tmp = load <4 x float>, <4 x float>* null, align 1 31 %tmp14 = getelementptr <4 x float>, <4 x float>* null, i32 2 32 %tmp15 = load <4 x float>, <4 x float>* %tmp14, align 1 33 %tmp16 = shufflevector <4 x float> %tmp, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4> 34 %tmp17 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %tmp16, <4 x float> %a, i8 1) 35 %tmp18 = bitcast <4 x float> %tmp to <16 x i8> 36 %tmp19 = shufflevector <16 x i8> %tmp18, <16 x i8> %b, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 37 %tmp20 = bitcast <16 x i8> %tmp19 to <4 x float> 38 %tmp21 = bitcast <4 x float> %tmp15 to <16 x i8> 39 %tmp22 = shufflevector <16 x i8> %c, <16 x i8> %tmp21, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 40 %tmp23 = bitcast <16 x i8> %tmp22 to <4 x float> 41 %tmp24 = shufflevector <4 x float> %tmp20, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4> 42 %tmp25 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %tmp24, <4 x float> %tmp23, i8 1) 43 %tmp26 = fmul <8 x float> %tmp17, %tmp17 44 %tmp27 = fmul <8 x float> %tmp25, %tmp25 45 %tmp28 = fadd <8 x float> %tmp26, %tmp27 46 %tmp29 = fadd <8 x float> %tmp28, %tmp28 47 %tmp30 = shufflevector <8 x float> %tmp29, <8 x float> %d, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 48 %tmp31 = fmul <4 x float> %tmp30, %tmp30 49 %tmp32 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> zeroinitializer, <4 x float> %tmp31, i8 1) 50 %tmp33 = fadd <8 x float> %tmp32, %tmp32 51 %tmp34 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %tmp33, <8 x float> %e) nounwind 52 %tmp35 = fsub <8 x float> %tmp34, %tmp34 53 %tmp36 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> zeroinitializer, <8 x float> %tmp35) nounwind 54 store <8 x float> %tmp36, <8 x float>* %f, align 32 55 ret void 56 } 57 58 declare <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float>, <4 x float>, i8) nounwind readnone 59 60 declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) nounwind readnone 61
