1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2 # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64 3 # RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32 4 --- | 5 6 define void @test_add_i1() { ret void} 7 define void @test_add_i32() { ret void } 8 define void @test_add_i64() { ret void } 9 10 ... 11 --- 12 name: test_add_i1 13 # CHECK-LABEL: name: test_add_i1 14 alignment: 4 15 legalized: false 16 regBankSelected: false 17 registers: 18 - { id: 0, class: _, preferred-register: '' } 19 - { id: 1, class: _, preferred-register: '' } 20 - { id: 2, class: _, preferred-register: '' } 21 # CHECK: %0(s32) = COPY $edx 22 # CHECK-NEXT: %3(s8) = G_TRUNC %0(s32) 23 # CHECK-NEXT: %4(s8) = G_TRUNC %0(s32) 24 # CHECK-NEXT: %5(s8) = G_ADD %3, %4 25 # CHECK: RET 0 26 body: | 27 bb.1 (%ir-block.0): 28 29 ; X64-LABEL: name: test_add_i1 30 ; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edx 31 ; X64: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) 32 ; X64: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) 33 ; X64: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]] 34 ; X64: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8) 35 ; X64: $eax = COPY [[ANYEXT]](s32) 36 ; X64: RET 0 37 ; X32-LABEL: name: test_add_i1 38 ; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edx 39 ; X32: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) 40 ; X32: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32) 41 ; X32: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]] 42 ; X32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8) 43 ; X32: $eax = COPY [[ANYEXT]](s32) 44 ; X32: RET 0 45 %0(s32) = COPY $edx 46 %1(s1) = G_TRUNC %0(s32) 47 %2(s1) = G_ADD %1, %1 48 %3:_(s32) = G_ANYEXT %2 49 $eax = COPY %3 50 RET 0 51 ... 52 --- 53 name: test_add_i32 54 alignment: 4 55 legalized: false 56 regBankSelected: false 57 registers: 58 - { id: 0, class: _ } 59 - { id: 1, class: _ } 60 - { id: 2, class: _ } 61 body: | 62 bb.1 (%ir-block.0): 63 ; X64-LABEL: name: test_add_i32 64 ; X64: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF 65 ; X64: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF 66 ; X64: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]] 67 ; X64: $eax = COPY [[ADD]](s32) 68 ; X64: RET 0 69 ; X32-LABEL: name: test_add_i32 70 ; X32: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF 71 ; X32: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF 72 ; X32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]] 73 ; X32: $eax = COPY [[ADD]](s32) 74 ; X32: RET 0 75 %0(s32) = IMPLICIT_DEF 76 %1(s32) = IMPLICIT_DEF 77 %2(s32) = G_ADD %0, %1 78 $eax = COPY %2 79 RET 0 80 81 ... 82 --- 83 name: test_add_i64 84 alignment: 4 85 legalized: false 86 regBankSelected: false 87 registers: 88 - { id: 0, class: _ } 89 - { id: 1, class: _ } 90 - { id: 2, class: _ } 91 body: | 92 bb.1 (%ir-block.0): 93 ; X64-LABEL: name: test_add_i64 94 ; X64: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF 95 ; X64: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF 96 ; X64: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[DEF]], [[DEF1]] 97 ; X64: $rax = COPY [[ADD]](s64) 98 ; X64: RET 0 99 ; X32-LABEL: name: test_add_i64 100 ; X32: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF 101 ; X32: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF 102 ; X32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64) 103 ; X32: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64) 104 ; X32: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0 105 ; X32: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s8) 106 ; X32: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV]], [[UV2]], [[TRUNC]] 107 ; X32: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV3]], [[UADDE1]] 108 ; X32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDE]](s32), [[UADDE2]](s32) 109 ; X32: $rax = COPY [[MV]](s64) 110 ; X32: RET 0 111 %0(s64) = IMPLICIT_DEF 112 %1(s64) = IMPLICIT_DEF 113 %2(s64) = G_ADD %0, %1 114 $rax = COPY %2 115 RET 0 116 117 ... 118
