1 ; RUN: llc -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | FileCheck %s 2 3 ; REQUIRES: asserts 4 5 ; CHECK-LABEL: Pass Arguments: 6 ; CHECK-NEXT: Target Library Information 7 ; CHECK-NEXT: Target Pass Configuration 8 ; CHECK-NEXT: Machine Module Information 9 ; CHECK-NEXT: Target Transform Information 10 ; CHECK-NEXT: Type-Based Alias Analysis 11 ; CHECK-NEXT: Scoped NoAlias Alias Analysis 12 ; CHECK-NEXT: Assumption Cache Tracker 13 ; CHECK-NEXT: Create Garbage Collector Module Metadata 14 ; CHECK-NEXT: Profile summary info 15 ; CHECK-NEXT: Machine Branch Probability Analysis 16 ; CHECK-NEXT: ModulePass Manager 17 ; CHECK-NEXT: Pre-ISel Intrinsic Lowering 18 ; CHECK-NEXT: FunctionPass Manager 19 ; CHECK-NEXT: Expand Atomic instructions 20 ; CHECK-NEXT: Dominator Tree Construction 21 ; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) 22 ; CHECK-NEXT: Module Verifier 23 ; CHECK-NEXT: Natural Loop Information 24 ; CHECK-NEXT: Canonicalize natural loops 25 ; CHECK-NEXT: Scalar Evolution Analysis 26 ; CHECK-NEXT: Loop Pass Manager 27 ; CHECK-NEXT: Induction Variable Users 28 ; CHECK-NEXT: Loop Strength Reduction 29 ; CHECK-NEXT: Merge contiguous icmps into a memcmp 30 ; CHECK-NEXT: Expand memcmp() to load/stores 31 ; CHECK-NEXT: Lower Garbage Collection Instructions 32 ; CHECK-NEXT: Shadow Stack GC Lowering 33 ; CHECK-NEXT: Remove unreachable blocks from the CFG 34 ; CHECK-NEXT: Dominator Tree Construction 35 ; CHECK-NEXT: Natural Loop Information 36 ; CHECK-NEXT: Branch Probability Analysis 37 ; CHECK-NEXT: Block Frequency Analysis 38 ; CHECK-NEXT: Constant Hoisting 39 ; CHECK-NEXT: Partially inline calls to library functions 40 ; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining) 41 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics 42 ; CHECK-NEXT: Expand reduction intrinsics 43 ; CHECK-NEXT: Dominator Tree Construction 44 ; CHECK-NEXT: Interleaved Access Pass 45 ; CHECK-NEXT: Expand indirectbr instructions 46 ; CHECK-NEXT: Dominator Tree Construction 47 ; CHECK-NEXT: Natural Loop Information 48 ; CHECK-NEXT: CodeGen Prepare 49 ; CHECK-NEXT: Rewrite Symbols 50 ; CHECK-NEXT: FunctionPass Manager 51 ; CHECK-NEXT: Dominator Tree Construction 52 ; CHECK-NEXT: Exception handling preparation 53 ; CHECK-NEXT: Safe Stack instrumentation pass 54 ; CHECK-NEXT: Insert stack protectors 55 ; CHECK-NEXT: Module Verifier 56 ; CHECK-NEXT: Dominator Tree Construction 57 ; CHECK-NEXT: Basic Alias Analysis (stateless AA impl) 58 ; CHECK-NEXT: Function Alias Analysis Results 59 ; CHECK-NEXT: Natural Loop Information 60 ; CHECK-NEXT: Branch Probability Analysis 61 ; CHECK-NEXT: X86 DAG->DAG Instruction Selection 62 ; CHECK-NEXT: MachineDominator Tree Construction 63 ; CHECK-NEXT: Local Dynamic TLS Access Clean-up 64 ; CHECK-NEXT: X86 PIC Global Base Reg Initialization 65 ; CHECK-NEXT: Expand ISel Pseudo-instructions 66 ; CHECK-NEXT: X86 Domain Reassignment Pass 67 ; CHECK-NEXT: Early Tail Duplication 68 ; CHECK-NEXT: Optimize machine instruction PHIs 69 ; CHECK-NEXT: Slot index numbering 70 ; CHECK-NEXT: Merge disjoint stack slots 71 ; CHECK-NEXT: Local Stack Slot Allocation 72 ; CHECK-NEXT: Remove dead machine instructions 73 ; CHECK-NEXT: MachineDominator Tree Construction 74 ; CHECK-NEXT: Machine Natural Loop Construction 75 ; CHECK-NEXT: Machine Trace Metrics 76 ; CHECK-NEXT: Early If-Conversion 77 ; CHECK-NEXT: Machine InstCombiner 78 ; CHECK-NEXT: X86 cmov Conversion 79 ; CHECK-NEXT: MachineDominator Tree Construction 80 ; CHECK-NEXT: Machine Natural Loop Construction 81 ; CHECK-NEXT: Early Machine Loop Invariant Code Motion 82 ; CHECK-NEXT: Machine Common Subexpression Elimination 83 ; CHECK-NEXT: MachinePostDominator Tree Construction 84 ; CHECK-NEXT: Machine Block Frequency Analysis 85 ; CHECK-NEXT: Machine code sinking 86 ; CHECK-NEXT: Peephole Optimizations 87 ; CHECK-NEXT: Remove dead machine instructions 88 ; CHECK-NEXT: Live Range Shrink 89 ; CHECK-NEXT: X86 Fixup SetCC 90 ; CHECK-NEXT: X86 LEA Optimize 91 ; CHECK-NEXT: X86 Optimize Call Frame 92 ; CHECK-NEXT: X86 Avoid Store Forwarding Block 93 ; CHECK-NEXT: MachineDominator Tree Construction 94 ; CHECK-NEXT: X86 EFLAGS copy lowering 95 ; CHECK-NEXT: X86 WinAlloca Expander 96 ; CHECK-NEXT: Detect Dead Lanes 97 ; CHECK-NEXT: Process Implicit Definitions 98 ; CHECK-NEXT: Remove unreachable machine basic blocks 99 ; CHECK-NEXT: Live Variable Analysis 100 ; CHECK-NEXT: MachineDominator Tree Construction 101 ; CHECK-NEXT: Machine Natural Loop Construction 102 ; CHECK-NEXT: Eliminate PHI nodes for register allocation 103 ; CHECK-NEXT: Two-Address instruction pass 104 ; CHECK-NEXT: Slot index numbering 105 ; CHECK-NEXT: Live Interval Analysis 106 ; CHECK-NEXT: Simple Register Coalescing 107 ; CHECK-NEXT: Rename Disconnected Subregister Components 108 ; CHECK-NEXT: Machine Instruction Scheduler 109 ; CHECK-NEXT: Machine Block Frequency Analysis 110 ; CHECK-NEXT: Debug Variable Analysis 111 ; CHECK-NEXT: Live Stack Slot Analysis 112 ; CHECK-NEXT: Virtual Register Map 113 ; CHECK-NEXT: Live Register Matrix 114 ; CHECK-NEXT: Bundle Machine CFG Edges 115 ; CHECK-NEXT: Spill Code Placement Analysis 116 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis 117 ; CHECK-NEXT: Machine Optimization Remark Emitter 118 ; CHECK-NEXT: Greedy Register Allocator 119 ; CHECK-NEXT: Virtual Register Rewriter 120 ; CHECK-NEXT: Stack Slot Coloring 121 ; CHECK-NEXT: Machine Copy Propagation Pass 122 ; CHECK-NEXT: Machine Loop Invariant Code Motion 123 ; CHECK-NEXT: Bundle Machine CFG Edges 124 ; CHECK-NEXT: X86 FP Stackifier 125 ; CHECK-NEXT: PostRA Machine Sink 126 ; CHECK-NEXT: Machine Block Frequency Analysis 127 ; CHECK-NEXT: MachinePostDominator Tree Construction 128 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis 129 ; CHECK-NEXT: Machine Optimization Remark Emitter 130 ; CHECK-NEXT: Shrink Wrapping analysis 131 ; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization 132 ; CHECK-NEXT: Control Flow Optimizer 133 ; CHECK-NEXT: Tail Duplication 134 ; CHECK-NEXT: Machine Copy Propagation Pass 135 ; CHECK-NEXT: Post-RA pseudo instruction expansion pass 136 ; CHECK-NEXT: X86 pseudo instruction expansion pass 137 ; CHECK-NEXT: MachineDominator Tree Construction 138 ; CHECK-NEXT: Machine Natural Loop Construction 139 ; CHECK-NEXT: Post RA top-down list latency scheduler 140 ; CHECK-NEXT: Analyze Machine Code For Garbage Collection 141 ; CHECK-NEXT: Machine Block Frequency Analysis 142 ; CHECK-NEXT: MachinePostDominator Tree Construction 143 ; CHECK-NEXT: Branch Probability Basic Block Placement 144 ; CHECK-NEXT: ReachingDefAnalysis 145 ; CHECK-NEXT: X86 Execution Dependency Fix 146 ; CHECK-NEXT: BreakFalseDeps 147 ; CHECK-NEXT: Shadow Call Stack 148 ; CHECK-NEXT: X86 Indirect Branch Tracking 149 ; CHECK-NEXT: X86 vzeroupper inserter 150 ; CHECK-NEXT: MachineDominator Tree Construction 151 ; CHECK-NEXT: Machine Natural Loop Construction 152 ; CHECK-NEXT: X86 Byte/Word Instruction Fixup 153 ; CHECK-NEXT: X86 Atom pad short functions 154 ; CHECK-NEXT: X86 LEA Fixup 155 ; CHECK-NEXT: Compressing EVEX instrs to VEX encoding when possible 156 ; CHECK-NEXT: Contiguously Lay Out Funclets 157 ; CHECK-NEXT: StackMap Liveness Analysis 158 ; CHECK-NEXT: Live DEBUG_VALUE analysis 159 ; CHECK-NEXT: Insert fentry calls 160 ; CHECK-NEXT: Insert XRay ops 161 ; CHECK-NEXT: Implement the 'patchable-function' attribute 162 ; CHECK-NEXT: X86 Retpoline Thunks 163 ; CHECK-NEXT: Check CFA info and insert CFI instructions if needed 164 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis 165 ; CHECK-NEXT: Machine Optimization Remark Emitter 166 ; CHECK-NEXT: X86 Assembly Printer 167 ; CHECK-NEXT: Free MachineFunction 168 169 define void @f() { 170 ret void 171 } 172
