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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc < %s -mtriple=i386-unknown-unknown   -mattr=+aes,-avx -show-mc-encoding | FileCheck %s --check-prefix=SSE
      3 ; RUN: llc < %s -mtriple=i386-unknown-unknown   -mattr=+aes,+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX
      4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+aes,-avx -show-mc-encoding | FileCheck %s --check-prefix=SSE
      5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+aes,+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX
      6 
      7 define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) {
      8 ; SSE-LABEL: test_x86_aesni_aesdec:
      9 ; SSE:       # %bb.0:
     10 ; SSE-NEXT:    aesdec %xmm1, %xmm0 # encoding: [0x66,0x0f,0x38,0xde,0xc1]
     11 ; SSE-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     12 ;
     13 ; AVX-LABEL: test_x86_aesni_aesdec:
     14 ; AVX:       # %bb.0:
     15 ; AVX-NEXT:    vaesdec %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xde,0xc1]
     16 ; AVX-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     17   %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
     18   ret <2 x i64> %res
     19 }
     20 declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnone
     21 
     22 
     23 define <2 x i64> @test_x86_aesni_aesdeclast(<2 x i64> %a0, <2 x i64> %a1) {
     24 ; SSE-LABEL: test_x86_aesni_aesdeclast:
     25 ; SSE:       # %bb.0:
     26 ; SSE-NEXT:    aesdeclast %xmm1, %xmm0 # encoding: [0x66,0x0f,0x38,0xdf,0xc1]
     27 ; SSE-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     28 ;
     29 ; AVX-LABEL: test_x86_aesni_aesdeclast:
     30 ; AVX:       # %bb.0:
     31 ; AVX-NEXT:    vaesdeclast %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xdf,0xc1]
     32 ; AVX-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     33   %res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
     34   ret <2 x i64> %res
     35 }
     36 declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>) nounwind readnone
     37 
     38 
     39 define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) {
     40 ; SSE-LABEL: test_x86_aesni_aesenc:
     41 ; SSE:       # %bb.0:
     42 ; SSE-NEXT:    aesenc %xmm1, %xmm0 # encoding: [0x66,0x0f,0x38,0xdc,0xc1]
     43 ; SSE-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     44 ;
     45 ; AVX-LABEL: test_x86_aesni_aesenc:
     46 ; AVX:       # %bb.0:
     47 ; AVX-NEXT:    vaesenc %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xdc,0xc1]
     48 ; AVX-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     49   %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
     50   ret <2 x i64> %res
     51 }
     52 declare <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64>, <2 x i64>) nounwind readnone
     53 
     54 
     55 define <2 x i64> @test_x86_aesni_aesenclast(<2 x i64> %a0, <2 x i64> %a1) {
     56 ; SSE-LABEL: test_x86_aesni_aesenclast:
     57 ; SSE:       # %bb.0:
     58 ; SSE-NEXT:    aesenclast %xmm1, %xmm0 # encoding: [0x66,0x0f,0x38,0xdd,0xc1]
     59 ; SSE-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     60 ;
     61 ; AVX-LABEL: test_x86_aesni_aesenclast:
     62 ; AVX:       # %bb.0:
     63 ; AVX-NEXT:    vaesenclast %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xdd,0xc1]
     64 ; AVX-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     65   %res = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1]
     66   ret <2 x i64> %res
     67 }
     68 declare <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64>, <2 x i64>) nounwind readnone
     69 
     70 
     71 define <2 x i64> @test_x86_aesni_aesimc(<2 x i64> %a0) {
     72 ; SSE-LABEL: test_x86_aesni_aesimc:
     73 ; SSE:       # %bb.0:
     74 ; SSE-NEXT:    aesimc %xmm0, %xmm0 # encoding: [0x66,0x0f,0x38,0xdb,0xc0]
     75 ; SSE-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     76 ;
     77 ; AVX-LABEL: test_x86_aesni_aesimc:
     78 ; AVX:       # %bb.0:
     79 ; AVX-NEXT:    vaesimc %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x79,0xdb,0xc0]
     80 ; AVX-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     81   %res = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %a0) ; <<2 x i64>> [#uses=1]
     82   ret <2 x i64> %res
     83 }
     84 declare <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64>) nounwind readnone
     85 
     86 
     87 define <2 x i64> @test_x86_aesni_aeskeygenassist(<2 x i64> %a0) {
     88 ; SSE-LABEL: test_x86_aesni_aeskeygenassist:
     89 ; SSE:       # %bb.0:
     90 ; SSE-NEXT:    aeskeygenassist $7, %xmm0, %xmm0 # encoding: [0x66,0x0f,0x3a,0xdf,0xc0,0x07]
     91 ; SSE-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     92 ;
     93 ; AVX-LABEL: test_x86_aesni_aeskeygenassist:
     94 ; AVX:       # %bb.0:
     95 ; AVX-NEXT:    vaeskeygenassist $7, %xmm0, %xmm0 # encoding: [0xc4,0xe3,0x79,0xdf,0xc0,0x07]
     96 ; AVX-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
     97   %res = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %a0, i8 7) ; <<2 x i64>> [#uses=1]
     98   ret <2 x i64> %res
     99 }
    100 declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8) nounwind readnone
    101