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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc -mtriple=x86_64-unknown-unknown -show-mc-encoding < %s | FileCheck %s
      3 
      4 ; Test that the direct object emission selects the 'and' variant with 8-bit
      5 ; immediate.
      6 ; We used to get this wrong when using direct object emission, but not when
      7 ; reading assembly.
      8 
      9 define void @f1() nounwind {
     10 ; CHECK-LABEL: f1:
     11 ; CHECK:       # %bb.0:
     12 ; CHECK-NEXT:    pushq %rbp # encoding: [0x55]
     13 ; CHECK-NEXT:    movq %rsp, %rbp # encoding: [0x48,0x89,0xe5]
     14 ; CHECK-NEXT:    andq $-32, %rsp # encoding: [0x48,0x83,0xe4,0xe0]
     15 ; CHECK-NEXT:    movq %rbp, %rsp # encoding: [0x48,0x89,0xec]
     16 ; CHECK-NEXT:    popq %rbp # encoding: [0x5d]
     17 ; CHECK-NEXT:    retq # encoding: [0xc3]
     18   %foo = alloca i8, align 32
     19   ret void
     20 }
     21 
     22 define void @f2(i16 %x, i1 *%y) nounwind  {
     23 ; CHECK-LABEL: f2:
     24 ; CHECK:       # %bb.0:
     25 ; CHECK-NEXT:    andl $1, %edi # encoding: [0x83,0xe7,0x01]
     26 ; CHECK-NEXT:    movb %dil, (%rsi) # encoding: [0x40,0x88,0x3e]
     27 ; CHECK-NEXT:    retq # encoding: [0xc3]
     28   %c = trunc i16 %x to i1
     29   store i1 %c, i1* %y
     30   ret void
     31 }
     32 
     33 define void @f3(i32 %x, i1 *%y) nounwind {
     34 ; CHECK-LABEL: f3:
     35 ; CHECK:       # %bb.0:
     36 ; CHECK-NEXT:    andl $1, %edi # encoding: [0x83,0xe7,0x01]
     37 ; CHECK-NEXT:    movb %dil, (%rsi) # encoding: [0x40,0x88,0x3e]
     38 ; CHECK-NEXT:    retq # encoding: [0xc3]
     39   %c = trunc i32 %x to i1
     40   store i1 %c, i1* %y
     41   ret void
     42 }
     43 
     44 ; The immediate (0x0ffffff0) can be made into an i8 by making it negative.
     45 
     46 define i32 @lopped32_32to8(i32 %x) {
     47 ; CHECK-LABEL: lopped32_32to8:
     48 ; CHECK:       # %bb.0:
     49 ; CHECK-NEXT:    shrl $4, %edi # encoding: [0xc1,0xef,0x04]
     50 ; CHECK-NEXT:    andl $-16, %edi # encoding: [0x83,0xe7,0xf0]
     51 ; CHECK-NEXT:    movl %edi, %eax # encoding: [0x89,0xf8]
     52 ; CHECK-NEXT:    retq # encoding: [0xc3]
     53   %shr = lshr i32 %x, 4
     54   %and = and i32 %shr, 268435440
     55   ret i32 %and
     56 }
     57 
     58 ; The immediate (0x0ffffff0) can be made into an i8 by making it negative.
     59 
     60 define i64 @lopped64_32to8(i64 %x) {
     61 ; CHECK-LABEL: lopped64_32to8:
     62 ; CHECK:       # %bb.0:
     63 ; CHECK-NEXT:    shrq $36, %rdi # encoding: [0x48,0xc1,0xef,0x24]
     64 ; CHECK-NEXT:    andl $-16, %edi # encoding: [0x83,0xe7,0xf0]
     65 ; CHECK-NEXT:    movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
     66 ; CHECK-NEXT:    retq # encoding: [0xc3]
     67   %shr = lshr i64 %x, 36
     68   %and = and i64 %shr, 268435440
     69   ret i64 %and
     70 }
     71 
     72 ; The immediate (0x0ffffffffffffff0) can be made into an i8 by making it negative.
     73 
     74 define i64 @lopped64_64to8(i64 %x) {
     75 ; CHECK-LABEL: lopped64_64to8:
     76 ; CHECK:       # %bb.0:
     77 ; CHECK-NEXT:    shrq $4, %rdi # encoding: [0x48,0xc1,0xef,0x04]
     78 ; CHECK-NEXT:    andq $-16, %rdi # encoding: [0x48,0x83,0xe7,0xf0]
     79 ; CHECK-NEXT:    movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
     80 ; CHECK-NEXT:    retq # encoding: [0xc3]
     81   %shr = lshr i64 %x, 4
     82   %and = and i64 %shr, 1152921504606846960
     83   ret i64 %and
     84 }
     85 
     86 ; The immediate (0x0ffffffffff0fff0) can be made into an i32 by making it negative.
     87 
     88 define i64 @lopped64_64to32(i64 %x) {
     89 ; CHECK-LABEL: lopped64_64to32:
     90 ; CHECK:       # %bb.0:
     91 ; CHECK-NEXT:    shrq $4, %rdi # encoding: [0x48,0xc1,0xef,0x04]
     92 ; CHECK-NEXT:    andq $-983056, %rdi # encoding: [0x48,0x81,0xe7,0xf0,0xff,0xf0,0xff]
     93 ; CHECK-NEXT:    # imm = 0xFFF0FFF0
     94 ; CHECK-NEXT:    movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
     95 ; CHECK-NEXT:    retq # encoding: [0xc3]
     96   %shr = lshr i64 %x, 4
     97   %and = and i64 %shr, 1152921504605863920
     98   ret i64 %and
     99 }
    100 
    101 ; The transform is not limited to shifts - computeKnownBits() knows the top 4 bits
    102 ; must be cleared, so 0x0fffff80 can become 0x80 sign-extended.
    103 
    104 define i32 @shrinkAndKnownBits(i32 %x) {
    105 ; CHECK-LABEL: shrinkAndKnownBits:
    106 ; CHECK:       # %bb.0:
    107 ; CHECK-NEXT:    movl %edi, %ecx # encoding: [0x89,0xf9]
    108 ; CHECK-NEXT:    movl $4042322161, %eax # encoding: [0xb8,0xf1,0xf0,0xf0,0xf0]
    109 ; CHECK-NEXT:    # imm = 0xF0F0F0F1
    110 ; CHECK-NEXT:    imulq %rcx, %rax # encoding: [0x48,0x0f,0xaf,0xc1]
    111 ; CHECK-NEXT:    shrq $36, %rax # encoding: [0x48,0xc1,0xe8,0x24]
    112 ; CHECK-NEXT:    andl $-128, %eax # encoding: [0x83,0xe0,0x80]
    113 ; CHECK-NEXT:    # kill: def $eax killed $eax killed $rax
    114 ; CHECK-NEXT:    retq # encoding: [0xc3]
    115   %div = udiv i32 %x, 17
    116   %and = and i32 %div, 268435328
    117   ret i32 %and
    118 }
    119 
    120