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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc < %s -mcpu=skx | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
      3 ; RUN: llc < %s -mcpu=knl | FileCheck %s --check-prefixes=CHECK,CHECK-KNL
      4 
      5 target triple = "x86_64-unknown-unknown"
      6 
      7 define <8 x i64> @test1(<8 x i64> %m, <8 x i64> %a, <8 x i64> %b) {
      8 ; CHECK-SKX-LABEL: test1:
      9 ; CHECK-SKX:       # %bb.0: # %entry
     10 ; CHECK-SKX-NEXT:    vpsllq $63, %zmm0, %zmm0
     11 ; CHECK-SKX-NEXT:    vpmovq2m %zmm0, %k1
     12 ; CHECK-SKX-NEXT:    vpblendmq %zmm1, %zmm2, %zmm0 {%k1}
     13 ; CHECK-SKX-NEXT:    retq
     14 ;
     15 ; CHECK-KNL-LABEL: test1:
     16 ; CHECK-KNL:       # %bb.0: # %entry
     17 ; CHECK-KNL-NEXT:    vpsllq $63, %zmm0, %zmm0
     18 ; CHECK-KNL-NEXT:    vptestmq %zmm0, %zmm0, %k1
     19 ; CHECK-KNL-NEXT:    vpblendmq %zmm1, %zmm2, %zmm0 {%k1}
     20 ; CHECK-KNL-NEXT:    retq
     21 entry:
     22   %m.trunc = trunc <8 x i64> %m to <8 x i1>
     23   %ret = select <8 x i1> %m.trunc, <8 x i64> %a, <8 x i64> %b
     24   ret <8 x i64> %ret
     25 }
     26 
     27 ; This is a very contrived test case to trick the legalizer into splitting the
     28 ; v16i1 masks in the select during type legalization, and in so doing extend them
     29 ; into two v8i64 types. This lets us ensure that the lowering code can handle
     30 ; both formulations of vselect. All of this trickery is because we can't
     31 ; directly form an SDAG input to the lowering.
     32 define <16 x double> @test2(<16 x float> %x, <16 x float> %y, <16 x double> %a, <16 x double> %b) {
     33 ; CHECK-LABEL: test2:
     34 ; CHECK:       # %bb.0: # %entry
     35 ; CHECK-NEXT:    vxorps %xmm6, %xmm6, %xmm6
     36 ; CHECK-NEXT:    vcmpltps %zmm0, %zmm6, %k0
     37 ; CHECK-NEXT:    vcmpltps %zmm6, %zmm1, %k1
     38 ; CHECK-NEXT:    korw %k1, %k0, %k1
     39 ; CHECK-NEXT:    vblendmpd %zmm2, %zmm4, %zmm0 {%k1}
     40 ; CHECK-NEXT:    kshiftrw $8, %k1, %k1
     41 ; CHECK-NEXT:    vblendmpd %zmm3, %zmm5, %zmm1 {%k1}
     42 ; CHECK-NEXT:    retq
     43 entry:
     44   %gt.m = fcmp ogt <16 x float> %x, zeroinitializer
     45   %lt.m = fcmp olt <16 x float> %y, zeroinitializer
     46   %m.or = or <16 x i1> %gt.m, %lt.m
     47   %ret = select <16 x i1> %m.or, <16 x double> %a, <16 x double> %b
     48   ret <16 x double> %ret
     49 }
     50