1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=CHECK,BMI1 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=CHECK,BMI2 4 5 declare i64 @llvm.x86.bmi.bextr.64(i64, i64) 6 7 define i64 @bextr64(i64 %x, i64 %y) { 8 ; CHECK-LABEL: bextr64: 9 ; CHECK: # %bb.0: 10 ; CHECK-NEXT: bextrq %rsi, %rdi, %rax 11 ; CHECK-NEXT: retq 12 %tmp = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %y) 13 ret i64 %tmp 14 } 15 16 define i64 @bextr64b(i64 %x) uwtable ssp { 17 ; CHECK-LABEL: bextr64b: 18 ; CHECK: # %bb.0: 19 ; CHECK-NEXT: movl $3076, %eax # imm = 0xC04 20 ; CHECK-NEXT: bextrl %eax, %edi, %eax 21 ; CHECK-NEXT: retq 22 %1 = lshr i64 %x, 4 23 %2 = and i64 %1, 4095 24 ret i64 %2 25 } 26 27 ; Make sure we still use the AH subreg trick to extract 15:8 28 define i64 @bextr64_subreg(i64 %x) uwtable ssp { 29 ; CHECK-LABEL: bextr64_subreg: 30 ; CHECK: # %bb.0: 31 ; CHECK-NEXT: movq %rdi, %rax 32 ; CHECK-NEXT: movzbl %ah, %eax 33 ; CHECK-NEXT: retq 34 %1 = lshr i64 %x, 8 35 %2 = and i64 %1, 255 36 ret i64 %2 37 } 38 39 define i64 @bextr64b_load(i64* %x) { 40 ; CHECK-LABEL: bextr64b_load: 41 ; CHECK: # %bb.0: 42 ; CHECK-NEXT: movl $3076, %eax # imm = 0xC04 43 ; CHECK-NEXT: bextrl %eax, (%rdi), %eax 44 ; CHECK-NEXT: retq 45 %1 = load i64, i64* %x, align 8 46 %2 = lshr i64 %1, 4 47 %3 = and i64 %2, 4095 48 ret i64 %3 49 } 50 51 ; PR34042 52 define i64 @bextr64c(i64 %x, i32 %y) { 53 ; CHECK-LABEL: bextr64c: 54 ; CHECK: # %bb.0: 55 ; CHECK-NEXT: # kill: def $esi killed $esi def $rsi 56 ; CHECK-NEXT: bextrq %rsi, %rdi, %rax 57 ; CHECK-NEXT: retq 58 %tmp0 = sext i32 %y to i64 59 %tmp1 = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %tmp0) 60 ret i64 %tmp1 61 } 62 63 define i64 @bextr64d(i64 %a) { 64 ; CHECK-LABEL: bextr64d: 65 ; CHECK: # %bb.0: # %entry 66 ; CHECK-NEXT: movl $8450, %eax # imm = 0x2102 67 ; CHECK-NEXT: bextrq %rax, %rdi, %rax 68 ; CHECK-NEXT: retq 69 entry: 70 %shr = lshr i64 %a, 2 71 %and = and i64 %shr, 8589934591 72 ret i64 %and 73 } 74 75 define i64 @non_bextr64(i64 %x) { 76 ; CHECK-LABEL: non_bextr64: 77 ; CHECK: # %bb.0: # %entry 78 ; CHECK-NEXT: shrq $2, %rdi 79 ; CHECK-NEXT: movabsq $8589934590, %rax # imm = 0x1FFFFFFFE 80 ; CHECK-NEXT: andq %rdi, %rax 81 ; CHECK-NEXT: retq 82 entry: 83 %shr = lshr i64 %x, 2 84 %and = and i64 %shr, 8589934590 85 ret i64 %and 86 } 87
