1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx,+rdrnd,+rdseed | FileCheck %s 3 4 define i32 @foo(<2 x i64> %c, i32 %a, i32 %b) { 5 ; CHECK-LABEL: foo: 6 ; CHECK: # %bb.0: 7 ; CHECK-NEXT: ptest %xmm0, %xmm0 8 ; CHECK-NEXT: cmovnel %esi, %edi 9 ; CHECK-NEXT: movl %edi, %eax 10 ; CHECK-NEXT: retq 11 %t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c) 12 %t2 = icmp ne i32 %t1, 0 13 %t3 = select i1 %t2, i32 %a, i32 %b 14 ret i32 %t3 15 } 16 17 define i32 @bar(<2 x i64> %c) { 18 ; CHECK-LABEL: bar: 19 ; CHECK: # %bb.0: # %entry 20 ; CHECK-NEXT: ptest %xmm0, %xmm0 21 ; CHECK-NEXT: jne .LBB1_2 22 ; CHECK-NEXT: # %bb.1: # %if-true-block 23 ; CHECK-NEXT: xorl %eax, %eax 24 ; CHECK-NEXT: retq 25 ; CHECK-NEXT: .LBB1_2: # %endif-block 26 ; CHECK-NEXT: movl $1, %eax 27 ; CHECK-NEXT: retq 28 entry: 29 %0 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c) 30 %1 = icmp ne i32 %0, 0 31 br i1 %1, label %if-true-block, label %endif-block 32 if-true-block: 33 ret i32 0 34 endif-block: 35 ret i32 1 36 } 37 38 define i32 @bax(<2 x i64> %c) { 39 ; CHECK-LABEL: bax: 40 ; CHECK: # %bb.0: 41 ; CHECK-NEXT: xorl %eax, %eax 42 ; CHECK-NEXT: ptest %xmm0, %xmm0 43 ; CHECK-NEXT: sete %al 44 ; CHECK-NEXT: retq 45 %t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c) 46 %t2 = icmp eq i32 %t1, 1 47 %t3 = zext i1 %t2 to i32 48 ret i32 %t3 49 } 50 51 define i16 @rnd16(i16 %arg) nounwind { 52 ; CHECK-LABEL: rnd16: 53 ; CHECK: # %bb.0: 54 ; CHECK-NEXT: xorl %eax, %eax 55 ; CHECK-NEXT: rdrandw %cx 56 ; CHECK-NEXT: cmovbl %edi, %eax 57 ; CHECK-NEXT: addl %ecx, %eax 58 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 59 ; CHECK-NEXT: retq 60 %1 = tail call { i16, i32 } @llvm.x86.rdrand.16() nounwind 61 %2 = extractvalue { i16, i32 } %1, 0 62 %3 = extractvalue { i16, i32 } %1, 1 63 %4 = icmp eq i32 %3, 0 64 %5 = select i1 %4, i16 0, i16 %arg 65 %6 = add i16 %5, %2 66 ret i16 %6 67 } 68 69 define i32 @rnd32(i32 %arg) nounwind { 70 ; CHECK-LABEL: rnd32: 71 ; CHECK: # %bb.0: 72 ; CHECK-NEXT: xorl %eax, %eax 73 ; CHECK-NEXT: rdrandl %ecx 74 ; CHECK-NEXT: cmovbl %edi, %eax 75 ; CHECK-NEXT: addl %ecx, %eax 76 ; CHECK-NEXT: retq 77 %1 = tail call { i32, i32 } @llvm.x86.rdrand.32() nounwind 78 %2 = extractvalue { i32, i32 } %1, 0 79 %3 = extractvalue { i32, i32 } %1, 1 80 %4 = icmp eq i32 %3, 0 81 %5 = select i1 %4, i32 0, i32 %arg 82 %6 = add i32 %5, %2 83 ret i32 %6 84 } 85 86 define i64 @rnd64(i64 %arg) nounwind { 87 ; CHECK-LABEL: rnd64: 88 ; CHECK: # %bb.0: 89 ; CHECK-NEXT: xorl %eax, %eax 90 ; CHECK-NEXT: rdrandq %rcx 91 ; CHECK-NEXT: cmovbq %rdi, %rax 92 ; CHECK-NEXT: addq %rcx, %rax 93 ; CHECK-NEXT: retq 94 %1 = tail call { i64, i32 } @llvm.x86.rdrand.64() nounwind 95 %2 = extractvalue { i64, i32 } %1, 0 96 %3 = extractvalue { i64, i32 } %1, 1 97 %4 = icmp eq i32 %3, 0 98 %5 = select i1 %4, i64 0, i64 %arg 99 %6 = add i64 %5, %2 100 ret i64 %6 101 } 102 103 define i16 @seed16(i16 %arg) nounwind { 104 ; CHECK-LABEL: seed16: 105 ; CHECK: # %bb.0: 106 ; CHECK-NEXT: xorl %eax, %eax 107 ; CHECK-NEXT: rdseedw %cx 108 ; CHECK-NEXT: cmovbl %edi, %eax 109 ; CHECK-NEXT: addl %ecx, %eax 110 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 111 ; CHECK-NEXT: retq 112 %1 = tail call { i16, i32 } @llvm.x86.rdseed.16() nounwind 113 %2 = extractvalue { i16, i32 } %1, 0 114 %3 = extractvalue { i16, i32 } %1, 1 115 %4 = icmp eq i32 %3, 0 116 %5 = select i1 %4, i16 0, i16 %arg 117 %6 = add i16 %5, %2 118 ret i16 %6 119 } 120 121 define i32 @seed32(i32 %arg) nounwind { 122 ; CHECK-LABEL: seed32: 123 ; CHECK: # %bb.0: 124 ; CHECK-NEXT: xorl %eax, %eax 125 ; CHECK-NEXT: rdseedl %ecx 126 ; CHECK-NEXT: cmovbl %edi, %eax 127 ; CHECK-NEXT: addl %ecx, %eax 128 ; CHECK-NEXT: retq 129 %1 = tail call { i32, i32 } @llvm.x86.rdseed.32() nounwind 130 %2 = extractvalue { i32, i32 } %1, 0 131 %3 = extractvalue { i32, i32 } %1, 1 132 %4 = icmp eq i32 %3, 0 133 %5 = select i1 %4, i32 0, i32 %arg 134 %6 = add i32 %5, %2 135 ret i32 %6 136 } 137 138 define i64 @seed64(i64 %arg) nounwind { 139 ; CHECK-LABEL: seed64: 140 ; CHECK: # %bb.0: 141 ; CHECK-NEXT: xorl %eax, %eax 142 ; CHECK-NEXT: rdseedq %rcx 143 ; CHECK-NEXT: cmovbq %rdi, %rax 144 ; CHECK-NEXT: addq %rcx, %rax 145 ; CHECK-NEXT: retq 146 %1 = tail call { i64, i32 } @llvm.x86.rdseed.64() nounwind 147 %2 = extractvalue { i64, i32 } %1, 0 148 %3 = extractvalue { i64, i32 } %1, 1 149 %4 = icmp eq i32 %3, 0 150 %5 = select i1 %4, i64 0, i64 %arg 151 %6 = add i64 %5, %2 152 ret i64 %6 153 } 154 155 declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone 156 declare { i16, i32 } @llvm.x86.rdrand.16() nounwind 157 declare { i32, i32 } @llvm.x86.rdrand.32() nounwind 158 declare { i64, i32 } @llvm.x86.rdrand.64() nounwind 159 declare { i16, i32 } @llvm.x86.rdseed.16() nounwind 160 declare { i32, i32 } @llvm.x86.rdseed.32() nounwind 161 declare { i64, i32 } @llvm.x86.rdseed.64() nounwind 162
