1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=CMOV 3 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=NO_CMOV 4 5 define i16 @cmov_zpromotion_8_to_16(i1 %c) { 6 ; CMOV-LABEL: cmov_zpromotion_8_to_16: 7 ; CMOV: # %bb.0: 8 ; CMOV-NEXT: testb $1, %dil 9 ; CMOV-NEXT: movb $117, %al 10 ; CMOV-NEXT: jne .LBB0_2 11 ; CMOV-NEXT: # %bb.1: 12 ; CMOV-NEXT: movb $-19, %al 13 ; CMOV-NEXT: .LBB0_2: 14 ; CMOV-NEXT: movzbl %al, %eax 15 ; CMOV-NEXT: # kill: def $ax killed $ax killed $eax 16 ; CMOV-NEXT: retq 17 ; 18 ; NO_CMOV-LABEL: cmov_zpromotion_8_to_16: 19 ; NO_CMOV: # %bb.0: 20 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 21 ; NO_CMOV-NEXT: movb $117, %al 22 ; NO_CMOV-NEXT: jne .LBB0_2 23 ; NO_CMOV-NEXT: # %bb.1: 24 ; NO_CMOV-NEXT: movb $-19, %al 25 ; NO_CMOV-NEXT: .LBB0_2: 26 ; NO_CMOV-NEXT: movzbl %al, %eax 27 ; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax 28 ; NO_CMOV-NEXT: retl 29 %t0 = select i1 %c, i8 117, i8 -19 30 %ret = zext i8 %t0 to i16 31 ret i16 %ret 32 } 33 34 define i32 @cmov_zpromotion_8_to_32(i1 %c) { 35 ; CMOV-LABEL: cmov_zpromotion_8_to_32: 36 ; CMOV: # %bb.0: 37 ; CMOV-NEXT: testb $1, %dil 38 ; CMOV-NEXT: movb $126, %al 39 ; CMOV-NEXT: jne .LBB1_2 40 ; CMOV-NEXT: # %bb.1: 41 ; CMOV-NEXT: movb $-1, %al 42 ; CMOV-NEXT: .LBB1_2: 43 ; CMOV-NEXT: movzbl %al, %eax 44 ; CMOV-NEXT: retq 45 ; 46 ; NO_CMOV-LABEL: cmov_zpromotion_8_to_32: 47 ; NO_CMOV: # %bb.0: 48 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 49 ; NO_CMOV-NEXT: movb $126, %al 50 ; NO_CMOV-NEXT: jne .LBB1_2 51 ; NO_CMOV-NEXT: # %bb.1: 52 ; NO_CMOV-NEXT: movb $-1, %al 53 ; NO_CMOV-NEXT: .LBB1_2: 54 ; NO_CMOV-NEXT: movzbl %al, %eax 55 ; NO_CMOV-NEXT: retl 56 %t0 = select i1 %c, i8 12414, i8 -1 57 %ret = zext i8 %t0 to i32 58 ret i32 %ret 59 } 60 61 define i64 @cmov_zpromotion_8_to_64(i1 %c) { 62 ; CMOV-LABEL: cmov_zpromotion_8_to_64: 63 ; CMOV: # %bb.0: 64 ; CMOV-NEXT: testb $1, %dil 65 ; CMOV-NEXT: movb $126, %al 66 ; CMOV-NEXT: jne .LBB2_2 67 ; CMOV-NEXT: # %bb.1: 68 ; CMOV-NEXT: movb $-1, %al 69 ; CMOV-NEXT: .LBB2_2: 70 ; CMOV-NEXT: movzbl %al, %eax 71 ; CMOV-NEXT: retq 72 ; 73 ; NO_CMOV-LABEL: cmov_zpromotion_8_to_64: 74 ; NO_CMOV: # %bb.0: 75 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 76 ; NO_CMOV-NEXT: movb $126, %al 77 ; NO_CMOV-NEXT: jne .LBB2_2 78 ; NO_CMOV-NEXT: # %bb.1: 79 ; NO_CMOV-NEXT: movb $-1, %al 80 ; NO_CMOV-NEXT: .LBB2_2: 81 ; NO_CMOV-NEXT: movzbl %al, %eax 82 ; NO_CMOV-NEXT: xorl %edx, %edx 83 ; NO_CMOV-NEXT: retl 84 %t0 = select i1 %c, i8 12414, i8 -1 85 %ret = zext i8 %t0 to i64 86 ret i64 %ret 87 } 88 89 define i32 @cmov_zpromotion_16_to_32(i1 %c) { 90 ; CMOV-LABEL: cmov_zpromotion_16_to_32: 91 ; CMOV: # %bb.0: 92 ; CMOV-NEXT: testb $1, %dil 93 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E 94 ; CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF 95 ; CMOV-NEXT: cmovnel %ecx, %eax 96 ; CMOV-NEXT: retq 97 ; 98 ; NO_CMOV-LABEL: cmov_zpromotion_16_to_32: 99 ; NO_CMOV: # %bb.0: 100 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 101 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E 102 ; NO_CMOV-NEXT: jne .LBB3_2 103 ; NO_CMOV-NEXT: # %bb.1: 104 ; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF 105 ; NO_CMOV-NEXT: .LBB3_2: 106 ; NO_CMOV-NEXT: retl 107 %t0 = select i1 %c, i16 12414, i16 -1 108 %ret = zext i16 %t0 to i32 109 ret i32 %ret 110 } 111 112 define i64 @cmov_zpromotion_16_to_64(i1 %c) { 113 ; CMOV-LABEL: cmov_zpromotion_16_to_64: 114 ; CMOV: # %bb.0: 115 ; CMOV-NEXT: testb $1, %dil 116 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E 117 ; CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF 118 ; CMOV-NEXT: cmovnel %ecx, %eax 119 ; CMOV-NEXT: retq 120 ; 121 ; NO_CMOV-LABEL: cmov_zpromotion_16_to_64: 122 ; NO_CMOV: # %bb.0: 123 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 124 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E 125 ; NO_CMOV-NEXT: jne .LBB4_2 126 ; NO_CMOV-NEXT: # %bb.1: 127 ; NO_CMOV-NEXT: movl $65535, %eax # imm = 0xFFFF 128 ; NO_CMOV-NEXT: .LBB4_2: 129 ; NO_CMOV-NEXT: xorl %edx, %edx 130 ; NO_CMOV-NEXT: retl 131 %t0 = select i1 %c, i16 12414, i16 -1 132 %ret = zext i16 %t0 to i64 133 ret i64 %ret 134 } 135 136 define i64 @cmov_zpromotion_32_to_64(i1 %c) { 137 ; CMOV-LABEL: cmov_zpromotion_32_to_64: 138 ; CMOV: # %bb.0: 139 ; CMOV-NEXT: testb $1, %dil 140 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E 141 ; CMOV-NEXT: movl $-1, %eax 142 ; CMOV-NEXT: cmovnel %ecx, %eax 143 ; CMOV-NEXT: retq 144 ; 145 ; NO_CMOV-LABEL: cmov_zpromotion_32_to_64: 146 ; NO_CMOV: # %bb.0: 147 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 148 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E 149 ; NO_CMOV-NEXT: jne .LBB5_2 150 ; NO_CMOV-NEXT: # %bb.1: 151 ; NO_CMOV-NEXT: movl $-1, %eax 152 ; NO_CMOV-NEXT: .LBB5_2: 153 ; NO_CMOV-NEXT: xorl %edx, %edx 154 ; NO_CMOV-NEXT: retl 155 %t0 = select i1 %c, i32 12414, i32 -1 156 %ret = zext i32 %t0 to i64 157 ret i64 %ret 158 } 159 160 define i16 @cmov_spromotion_8_to_16(i1 %c) { 161 ; CMOV-LABEL: cmov_spromotion_8_to_16: 162 ; CMOV: # %bb.0: 163 ; CMOV-NEXT: testb $1, %dil 164 ; CMOV-NEXT: movb $117, %al 165 ; CMOV-NEXT: jne .LBB6_2 166 ; CMOV-NEXT: # %bb.1: 167 ; CMOV-NEXT: movb $-19, %al 168 ; CMOV-NEXT: .LBB6_2: 169 ; CMOV-NEXT: movsbl %al, %eax 170 ; CMOV-NEXT: # kill: def $ax killed $ax killed $eax 171 ; CMOV-NEXT: retq 172 ; 173 ; NO_CMOV-LABEL: cmov_spromotion_8_to_16: 174 ; NO_CMOV: # %bb.0: 175 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 176 ; NO_CMOV-NEXT: movb $117, %al 177 ; NO_CMOV-NEXT: jne .LBB6_2 178 ; NO_CMOV-NEXT: # %bb.1: 179 ; NO_CMOV-NEXT: movb $-19, %al 180 ; NO_CMOV-NEXT: .LBB6_2: 181 ; NO_CMOV-NEXT: movsbl %al, %eax 182 ; NO_CMOV-NEXT: # kill: def $ax killed $ax killed $eax 183 ; NO_CMOV-NEXT: retl 184 %t0 = select i1 %c, i8 117, i8 -19 185 %ret = sext i8 %t0 to i16 186 ret i16 %ret 187 } 188 189 define i32 @cmov_spromotion_8_to_32(i1 %c) { 190 ; CMOV-LABEL: cmov_spromotion_8_to_32: 191 ; CMOV: # %bb.0: 192 ; CMOV-NEXT: testb $1, %dil 193 ; CMOV-NEXT: movb $126, %al 194 ; CMOV-NEXT: jne .LBB7_2 195 ; CMOV-NEXT: # %bb.1: 196 ; CMOV-NEXT: movb $-1, %al 197 ; CMOV-NEXT: .LBB7_2: 198 ; CMOV-NEXT: movsbl %al, %eax 199 ; CMOV-NEXT: retq 200 ; 201 ; NO_CMOV-LABEL: cmov_spromotion_8_to_32: 202 ; NO_CMOV: # %bb.0: 203 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 204 ; NO_CMOV-NEXT: movb $126, %al 205 ; NO_CMOV-NEXT: jne .LBB7_2 206 ; NO_CMOV-NEXT: # %bb.1: 207 ; NO_CMOV-NEXT: movb $-1, %al 208 ; NO_CMOV-NEXT: .LBB7_2: 209 ; NO_CMOV-NEXT: movsbl %al, %eax 210 ; NO_CMOV-NEXT: retl 211 %t0 = select i1 %c, i8 12414, i8 -1 212 %ret = sext i8 %t0 to i32 213 ret i32 %ret 214 } 215 216 define i64 @cmov_spromotion_8_to_64(i1 %c) { 217 ; CMOV-LABEL: cmov_spromotion_8_to_64: 218 ; CMOV: # %bb.0: 219 ; CMOV-NEXT: testb $1, %dil 220 ; CMOV-NEXT: movb $126, %al 221 ; CMOV-NEXT: jne .LBB8_2 222 ; CMOV-NEXT: # %bb.1: 223 ; CMOV-NEXT: movb $-1, %al 224 ; CMOV-NEXT: .LBB8_2: 225 ; CMOV-NEXT: movsbq %al, %rax 226 ; CMOV-NEXT: retq 227 ; 228 ; NO_CMOV-LABEL: cmov_spromotion_8_to_64: 229 ; NO_CMOV: # %bb.0: 230 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 231 ; NO_CMOV-NEXT: movb $126, %al 232 ; NO_CMOV-NEXT: jne .LBB8_2 233 ; NO_CMOV-NEXT: # %bb.1: 234 ; NO_CMOV-NEXT: movb $-1, %al 235 ; NO_CMOV-NEXT: .LBB8_2: 236 ; NO_CMOV-NEXT: movsbl %al, %eax 237 ; NO_CMOV-NEXT: movl %eax, %edx 238 ; NO_CMOV-NEXT: sarl $31, %edx 239 ; NO_CMOV-NEXT: retl 240 %t0 = select i1 %c, i8 12414, i8 -1 241 %ret = sext i8 %t0 to i64 242 ret i64 %ret 243 } 244 245 define i32 @cmov_spromotion_16_to_32(i1 %c) { 246 ; CMOV-LABEL: cmov_spromotion_16_to_32: 247 ; CMOV: # %bb.0: 248 ; CMOV-NEXT: testb $1, %dil 249 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E 250 ; CMOV-NEXT: movl $-1, %eax 251 ; CMOV-NEXT: cmovnel %ecx, %eax 252 ; CMOV-NEXT: retq 253 ; 254 ; NO_CMOV-LABEL: cmov_spromotion_16_to_32: 255 ; NO_CMOV: # %bb.0: 256 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 257 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E 258 ; NO_CMOV-NEXT: jne .LBB9_2 259 ; NO_CMOV-NEXT: # %bb.1: 260 ; NO_CMOV-NEXT: movl $-1, %eax 261 ; NO_CMOV-NEXT: .LBB9_2: 262 ; NO_CMOV-NEXT: retl 263 %t0 = select i1 %c, i16 12414, i16 -1 264 %ret = sext i16 %t0 to i32 265 ret i32 %ret 266 } 267 268 define i64 @cmov_spromotion_16_to_64(i1 %c) { 269 ; CMOV-LABEL: cmov_spromotion_16_to_64: 270 ; CMOV: # %bb.0: 271 ; CMOV-NEXT: testb $1, %dil 272 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E 273 ; CMOV-NEXT: movq $-1, %rax 274 ; CMOV-NEXT: cmovneq %rcx, %rax 275 ; CMOV-NEXT: retq 276 ; 277 ; NO_CMOV-LABEL: cmov_spromotion_16_to_64: 278 ; NO_CMOV: # %bb.0: 279 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 280 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E 281 ; NO_CMOV-NEXT: jne .LBB10_2 282 ; NO_CMOV-NEXT: # %bb.1: 283 ; NO_CMOV-NEXT: movl $-1, %eax 284 ; NO_CMOV-NEXT: .LBB10_2: 285 ; NO_CMOV-NEXT: movl %eax, %edx 286 ; NO_CMOV-NEXT: sarl $31, %edx 287 ; NO_CMOV-NEXT: retl 288 %t0 = select i1 %c, i16 12414, i16 -1 289 %ret = sext i16 %t0 to i64 290 ret i64 %ret 291 } 292 293 define i64 @cmov_spromotion_32_to_64(i1 %c) { 294 ; CMOV-LABEL: cmov_spromotion_32_to_64: 295 ; CMOV: # %bb.0: 296 ; CMOV-NEXT: testb $1, %dil 297 ; CMOV-NEXT: movl $12414, %ecx # imm = 0x307E 298 ; CMOV-NEXT: movq $-1, %rax 299 ; CMOV-NEXT: cmovneq %rcx, %rax 300 ; CMOV-NEXT: retq 301 ; 302 ; NO_CMOV-LABEL: cmov_spromotion_32_to_64: 303 ; NO_CMOV: # %bb.0: 304 ; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp) 305 ; NO_CMOV-NEXT: movl $12414, %eax # imm = 0x307E 306 ; NO_CMOV-NEXT: jne .LBB11_2 307 ; NO_CMOV-NEXT: # %bb.1: 308 ; NO_CMOV-NEXT: movl $-1, %eax 309 ; NO_CMOV-NEXT: .LBB11_2: 310 ; NO_CMOV-NEXT: movl %eax, %edx 311 ; NO_CMOV-NEXT: sarl $31, %edx 312 ; NO_CMOV-NEXT: retl 313 %t0 = select i1 %c, i32 12414, i32 -1 314 %ret = sext i32 %t0 to i64 315 ret i64 %ret 316 } 317
