1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX 3 4 ; 5 ; NOTE: this is generated by utils/update_llc_test_checks.py but we can't check NAN types (PR30443), 6 ; so we need to edit it to remove the NAN constant comments 7 ; 8 9 ; fabs(c1) -> c2 10 define float @combine_fabs_constant() { 11 ; SSE-LABEL: combine_fabs_constant: 12 ; SSE: # %bb.0: 13 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 14 ; SSE-NEXT: retq 15 ; 16 ; AVX-LABEL: combine_fabs_constant: 17 ; AVX: # %bb.0: 18 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 19 ; AVX-NEXT: retq 20 %1 = call float @llvm.fabs.f32(float -2.0) 21 ret float %1 22 } 23 24 define <4 x float> @combine_vec_fabs_constant() { 25 ; SSE-LABEL: combine_vec_fabs_constant: 26 ; SSE: # %bb.0: 27 ; SSE-NEXT: movaps {{.*#+}} xmm0 = [0.000000e+00,0.000000e+00,2.000000e+00,2.000000e+00] 28 ; SSE-NEXT: retq 29 ; 30 ; AVX-LABEL: combine_vec_fabs_constant: 31 ; AVX: # %bb.0: 32 ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0.000000e+00,0.000000e+00,2.000000e+00,2.000000e+00] 33 ; AVX-NEXT: retq 34 %1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> <float 0.0, float -0.0, float 2.0, float -2.0>) 35 ret <4 x float> %1 36 } 37 38 ; fabs(fabs(x)) -> fabs(x) 39 define float @combine_fabs_fabs(float %a) { 40 ; SSE-LABEL: combine_fabs_fabs: 41 ; SSE: # %bb.0: 42 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0 43 ; SSE-NEXT: retq 44 ; 45 ; AVX-LABEL: combine_fabs_fabs: 46 ; AVX: # %bb.0: 47 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 48 ; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0 49 ; AVX-NEXT: retq 50 %1 = call float @llvm.fabs.f32(float %a) 51 %2 = call float @llvm.fabs.f32(float %1) 52 ret float %2 53 } 54 55 define <4 x float> @combine_vec_fabs_fabs(<4 x float> %a) { 56 ; SSE-LABEL: combine_vec_fabs_fabs: 57 ; SSE: # %bb.0: 58 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0 59 ; SSE-NEXT: retq 60 ; 61 ; AVX-LABEL: combine_vec_fabs_fabs: 62 ; AVX: # %bb.0: 63 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 64 ; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0 65 ; AVX-NEXT: retq 66 %1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a) 67 %2 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %1) 68 ret <4 x float> %2 69 } 70 71 ; fabs(fneg(x)) -> fabs(x) 72 define float @combine_fabs_fneg(float %a) { 73 ; SSE-LABEL: combine_fabs_fneg: 74 ; SSE: # %bb.0: 75 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0 76 ; SSE-NEXT: retq 77 ; 78 ; AVX-LABEL: combine_fabs_fneg: 79 ; AVX: # %bb.0: 80 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 81 ; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0 82 ; AVX-NEXT: retq 83 %1 = fsub float -0.0, %a 84 %2 = call float @llvm.fabs.f32(float %1) 85 ret float %2 86 } 87 88 define <4 x float> @combine_vec_fabs_fneg(<4 x float> %a) { 89 ; SSE-LABEL: combine_vec_fabs_fneg: 90 ; SSE: # %bb.0: 91 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0 92 ; SSE-NEXT: retq 93 ; 94 ; AVX-LABEL: combine_vec_fabs_fneg: 95 ; AVX: # %bb.0: 96 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 97 ; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0 98 ; AVX-NEXT: retq 99 %1 = fsub <4 x float> <float -0.0, float -0.0, float -0.0, float -0.0>, %a 100 %2 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %1) 101 ret <4 x float> %2 102 } 103 104 ; fabs(fcopysign(x, y)) -> fabs(x) 105 define float @combine_fabs_fcopysign(float %a, float %b) { 106 ; SSE-LABEL: combine_fabs_fcopysign: 107 ; SSE: # %bb.0: 108 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0 109 ; SSE-NEXT: retq 110 ; 111 ; AVX-LABEL: combine_fabs_fcopysign: 112 ; AVX: # %bb.0: 113 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 114 ; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0 115 ; AVX-NEXT: retq 116 %1 = call float @llvm.copysign.f32(float %a, float %b) 117 %2 = call float @llvm.fabs.f32(float %1) 118 ret float %2 119 } 120 121 define <4 x float> @combine_vec_fabs_fcopysign(<4 x float> %a, <4 x float> %b) { 122 ; SSE-LABEL: combine_vec_fabs_fcopysign: 123 ; SSE: # %bb.0: 124 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0 125 ; SSE-NEXT: retq 126 ; 127 ; AVX-LABEL: combine_vec_fabs_fcopysign: 128 ; AVX: # %bb.0: 129 ; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 130 ; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0 131 ; AVX-NEXT: retq 132 %1 = call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> %b) 133 %2 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %1) 134 ret <4 x float> %2 135 } 136 137 declare float @llvm.fabs.f32(float %p) 138 declare float @llvm.copysign.f32(float %Mag, float %Sgn) 139 140 declare <4 x float> @llvm.fabs.v4f32(<4 x float> %p) 141 declare <4 x float> @llvm.copysign.v4f32(<4 x float> %Mag, <4 x float> %Sgn) 142
