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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
      3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
      4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE42
      5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
      6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
      7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
      8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
      9 
     10 define <8 x i16> @test_v8i16_nosignbit(<8 x i16> %a, <8 x i16> %b) {
     11 ; SSE2-LABEL: test_v8i16_nosignbit:
     12 ; SSE2:       # %bb.0:
     13 ; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
     14 ; SSE2-NEXT:    psrlw $1, %xmm1
     15 ; SSE2-NEXT:    pminsw %xmm1, %xmm0
     16 ; SSE2-NEXT:    retq
     17 ;
     18 ; SSE41-LABEL: test_v8i16_nosignbit:
     19 ; SSE41:       # %bb.0:
     20 ; SSE41-NEXT:    pand {{.*}}(%rip), %xmm0
     21 ; SSE41-NEXT:    psrlw $1, %xmm1
     22 ; SSE41-NEXT:    pminuw %xmm1, %xmm0
     23 ; SSE41-NEXT:    retq
     24 ;
     25 ; SSE42-LABEL: test_v8i16_nosignbit:
     26 ; SSE42:       # %bb.0:
     27 ; SSE42-NEXT:    pand {{.*}}(%rip), %xmm0
     28 ; SSE42-NEXT:    psrlw $1, %xmm1
     29 ; SSE42-NEXT:    pminuw %xmm1, %xmm0
     30 ; SSE42-NEXT:    retq
     31 ;
     32 ; AVX-LABEL: test_v8i16_nosignbit:
     33 ; AVX:       # %bb.0:
     34 ; AVX-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
     35 ; AVX-NEXT:    vpsrlw $1, %xmm1, %xmm1
     36 ; AVX-NEXT:    vpminuw %xmm1, %xmm0, %xmm0
     37 ; AVX-NEXT:    retq
     38   %1 = and <8 x i16> %a, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>
     39   %2 = lshr <8 x i16> %b, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
     40   %3 = icmp ult <8 x i16> %1, %2
     41   %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
     42   ret <8 x i16> %4
     43 }
     44