1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s | FileCheck %s 3 4 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" 5 target triple = "x86_64-unknown-unknown" 6 7 define void @PR22524({ float, float }* %arg) { 8 ; Check that we can materialize the zero constants we store in two places here, 9 ; and at least form a legal store of the floating point value at the end. 10 ; The DAG combiner at one point contained bugs that given enough permutations 11 ; would incorrectly form an illegal operation for the last of these stores when 12 ; it folded it to a zero too late to legalize the zero store operation. If this 13 ; ever starts forming a zero store instead of movss, the test case has stopped 14 ; being useful. 15 ; 16 ; CHECK-LABEL: PR22524: 17 ; CHECK: # %bb.0: # %entry 18 ; CHECK-NEXT: xorl %eax, %eax 19 ; CHECK-NEXT: movd %eax, %xmm0 20 ; CHECK-NEXT: xorps %xmm1, %xmm1 21 ; CHECK-NEXT: mulss %xmm0, %xmm1 22 ; CHECK-NEXT: movq $0, (%rdi) 23 ; CHECK-NEXT: movss %xmm1, 4(%rdi) 24 ; CHECK-NEXT: retq 25 entry: 26 %0 = getelementptr inbounds { float, float }, { float, float }* %arg, i32 0, i32 1 27 store float 0.000000e+00, float* %0, align 4 28 %1 = getelementptr inbounds { float, float }, { float, float }* %arg, i64 0, i32 0 29 %2 = bitcast float* %1 to i64* 30 %3 = load i64, i64* %2, align 8 31 %4 = trunc i64 %3 to i32 32 %5 = lshr i64 %3, 32 33 %6 = trunc i64 %5 to i32 34 %7 = bitcast i32 %6 to float 35 %8 = fmul float %7, 0.000000e+00 36 %9 = bitcast float* %1 to i32* 37 store i32 %6, i32* %9, align 4 38 store float %8, float* %0, align 4 39 ret void 40 } 41
