1 ; RUN: llc < %s -mtriple=x86_64-pc-win32 -O0 -mattr=+avx | FileCheck %s 2 3 ; Background: 4 ; If fast-isel bails out to normal selection, then the DAG combiner will run, 5 ; even at -O0. In principle this should not happen (those are optimizations, 6 ; and we said -O0) but as a practical matter there are some instruction 7 ; selection patterns that depend on the legalizations and transforms that the 8 ; DAG combiner does. 9 ; 10 ; The 'optnone' attribute implicitly sets -O0 and fast-isel for the function. 11 ; The DAG combiner was disabled for 'optnone' (but not -O0) by r221168, then 12 ; re-enabled in r233153 because of problems with instruction selection patterns 13 ; mentioned above. (Note: because 'optnone' is supposed to match -O0, r221168 14 ; really should have disabled the combiner for both.) 15 ; 16 ; If instruction selection eventually becomes smart enough to run without DAG 17 ; combiner, then the combiner can be turned off for -O0 (not just 'optnone') 18 ; and this test can go away. (To be replaced by a different test that verifies 19 ; the DAG combiner does *not* run at -O0 or for 'optnone' functions.) 20 ; 21 ; In the meantime, this test wants to make sure the combiner stays enabled for 22 ; 'optnone' functions, just as it is for -O0. 23 24 25 ; The test cases @foo[WithOptnone] prove that the same DAG combine happens 26 ; with -O0 and with 'optnone' set. To prove this, we use a varags to cause 27 ; fast-isel to bail out (varags aren't handled in fast isel). Then we have 28 ; a repeated fadd that can be combined into an fmul. We show that this 29 ; happens in both the non-optnone function and the optnone function. 30 31 define float @foo(float %x, ...) #0 { 32 entry: 33 %add = fadd fast float %x, %x 34 %add1 = fadd fast float %add, %x 35 ret float %add1 36 } 37 38 ; CHECK-LABEL: @foo 39 ; CHECK-NOT: add 40 ; CHECK: mul 41 ; CHECK-NEXT: ret 42 43 define float @fooWithOptnone(float %x, ...) #1 { 44 entry: 45 %add = fadd fast float %x, %x 46 %add1 = fadd fast float %add, %x 47 ret float %add1 48 } 49 50 ; CHECK-LABEL: @fooWithOptnone 51 ; CHECK-NOT: add 52 ; CHECK: mul 53 ; CHECK-NEXT: ret 54 55 56 ; The test case @bar is derived from an instruction selection failure case 57 ; that was solved by r233153. It depends on -mattr=+avx. 58 ; Really all we're trying to prove is that it doesn't crash any more. 59 60 @id84 = common global <16 x i32> zeroinitializer, align 64 61 62 define void @bar(...) #1 { 63 entry: 64 %id83 = alloca <16 x i8>, align 16 65 %0 = load <16 x i32>, <16 x i32>* @id84, align 64 66 %conv = trunc <16 x i32> %0 to <16 x i8> 67 store <16 x i8> %conv, <16 x i8>* %id83, align 16 68 ret void 69 } 70 71 attributes #0 = { "unsafe-fp-math"="true" } 72 attributes #1 = { noinline optnone "unsafe-fp-math"="true" } 73
