1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i686-unknown -mcpu=penryn | FileCheck %s 3 4 ; Shows a dag combine bug that will generate an illegal build vector 5 ; with v2i64 build_vector i32, i32. 6 7 define void @test(<2 x double>* %dst, <4 x double> %src) nounwind { 8 ; CHECK-LABEL: test: 9 ; CHECK: # %bb.0: # %entry 10 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 11 ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] 12 ; CHECK-NEXT: movaps %xmm0, (%eax) 13 ; CHECK-NEXT: retl 14 entry: 15 %tmp7.i = shufflevector <4 x double> %src, <4 x double> undef, <2 x i32> <i32 0, i32 2> 16 store <2 x double> %tmp7.i, <2 x double>* %dst 17 ret void 18 } 19 20 define void @test2(<4 x i16>* %src, <4 x i32>* %dest) nounwind { 21 ; CHECK-LABEL: test2: 22 ; CHECK: # %bb.0: # %entry 23 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 24 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 25 ; CHECK-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero 26 ; CHECK-NEXT: movdqa %xmm0, (%eax) 27 ; CHECK-NEXT: retl 28 entry: 29 %tmp1 = load <4 x i16>, <4 x i16>* %src 30 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> 31 %0 = tail call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3) 32 store <4 x i32> %0, <4 x i32>* %dest 33 ret void 34 } 35 36 declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone 37
