1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2 3 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX 4 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX 5 ; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2_X86 6 ; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86 7 ; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86 8 9 10 define double @int_to_double_rr(i32 %a) { 11 ; SSE2-LABEL: int_to_double_rr: 12 ; SSE2: # %bb.0: # %entry 13 ; SSE2-NEXT: cvtsi2sdl %edi, %xmm0 14 ; SSE2-NEXT: retq 15 ; 16 ; AVX-LABEL: int_to_double_rr: 17 ; AVX: # %bb.0: # %entry 18 ; AVX-NEXT: vcvtsi2sdl %edi, %xmm0, %xmm0 19 ; AVX-NEXT: retq 20 ; 21 ; SSE2_X86-LABEL: int_to_double_rr: 22 ; SSE2_X86: # %bb.0: # %entry 23 ; SSE2_X86-NEXT: pushl %ebp 24 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8 25 ; SSE2_X86-NEXT: .cfi_offset %ebp, -8 26 ; SSE2_X86-NEXT: movl %esp, %ebp 27 ; SSE2_X86-NEXT: .cfi_def_cfa_register %ebp 28 ; SSE2_X86-NEXT: andl $-8, %esp 29 ; SSE2_X86-NEXT: subl $8, %esp 30 ; SSE2_X86-NEXT: movl 8(%ebp), %eax 31 ; SSE2_X86-NEXT: cvtsi2sdl %eax, %xmm0 32 ; SSE2_X86-NEXT: movsd %xmm0, (%esp) 33 ; SSE2_X86-NEXT: fldl (%esp) 34 ; SSE2_X86-NEXT: movl %ebp, %esp 35 ; SSE2_X86-NEXT: popl %ebp 36 ; SSE2_X86-NEXT: .cfi_def_cfa %esp, 4 37 ; SSE2_X86-NEXT: retl 38 ; 39 ; AVX_X86-LABEL: int_to_double_rr: 40 ; AVX_X86: # %bb.0: # %entry 41 ; AVX_X86-NEXT: pushl %ebp 42 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8 43 ; AVX_X86-NEXT: .cfi_offset %ebp, -8 44 ; AVX_X86-NEXT: movl %esp, %ebp 45 ; AVX_X86-NEXT: .cfi_def_cfa_register %ebp 46 ; AVX_X86-NEXT: andl $-8, %esp 47 ; AVX_X86-NEXT: subl $8, %esp 48 ; AVX_X86-NEXT: movl 8(%ebp), %eax 49 ; AVX_X86-NEXT: vcvtsi2sdl %eax, %xmm0, %xmm0 50 ; AVX_X86-NEXT: vmovsd %xmm0, (%esp) 51 ; AVX_X86-NEXT: fldl (%esp) 52 ; AVX_X86-NEXT: movl %ebp, %esp 53 ; AVX_X86-NEXT: popl %ebp 54 ; AVX_X86-NEXT: .cfi_def_cfa %esp, 4 55 ; AVX_X86-NEXT: retl 56 entry: 57 %0 = sitofp i32 %a to double 58 ret double %0 59 } 60 61 define double @int_to_double_rm(i32* %a) { 62 ; SSE2-LABEL: int_to_double_rm: 63 ; SSE2: # %bb.0: # %entry 64 ; SSE2-NEXT: movl (%rdi), %eax 65 ; SSE2-NEXT: cvtsi2sdl %eax, %xmm0 66 ; SSE2-NEXT: retq 67 ; 68 ; AVX-LABEL: int_to_double_rm: 69 ; AVX: # %bb.0: # %entry 70 ; AVX-NEXT: movl (%rdi), %eax 71 ; AVX-NEXT: vcvtsi2sdl %eax, %xmm0, %xmm0 72 ; AVX-NEXT: retq 73 ; 74 ; SSE2_X86-LABEL: int_to_double_rm: 75 ; SSE2_X86: # %bb.0: # %entry 76 ; SSE2_X86-NEXT: pushl %ebp 77 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8 78 ; SSE2_X86-NEXT: .cfi_offset %ebp, -8 79 ; SSE2_X86-NEXT: movl %esp, %ebp 80 ; SSE2_X86-NEXT: .cfi_def_cfa_register %ebp 81 ; SSE2_X86-NEXT: andl $-8, %esp 82 ; SSE2_X86-NEXT: subl $8, %esp 83 ; SSE2_X86-NEXT: movl 8(%ebp), %eax 84 ; SSE2_X86-NEXT: cvtsi2sdl (%eax), %xmm0 85 ; SSE2_X86-NEXT: movsd %xmm0, (%esp) 86 ; SSE2_X86-NEXT: fldl (%esp) 87 ; SSE2_X86-NEXT: movl %ebp, %esp 88 ; SSE2_X86-NEXT: popl %ebp 89 ; SSE2_X86-NEXT: .cfi_def_cfa %esp, 4 90 ; SSE2_X86-NEXT: retl 91 ; 92 ; AVX_X86-LABEL: int_to_double_rm: 93 ; AVX_X86: # %bb.0: # %entry 94 ; AVX_X86-NEXT: pushl %ebp 95 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8 96 ; AVX_X86-NEXT: .cfi_offset %ebp, -8 97 ; AVX_X86-NEXT: movl %esp, %ebp 98 ; AVX_X86-NEXT: .cfi_def_cfa_register %ebp 99 ; AVX_X86-NEXT: andl $-8, %esp 100 ; AVX_X86-NEXT: subl $8, %esp 101 ; AVX_X86-NEXT: movl 8(%ebp), %eax 102 ; AVX_X86-NEXT: vcvtsi2sdl (%eax), %xmm0, %xmm0 103 ; AVX_X86-NEXT: vmovsd %xmm0, (%esp) 104 ; AVX_X86-NEXT: fldl (%esp) 105 ; AVX_X86-NEXT: movl %ebp, %esp 106 ; AVX_X86-NEXT: popl %ebp 107 ; AVX_X86-NEXT: .cfi_def_cfa %esp, 4 108 ; AVX_X86-NEXT: retl 109 entry: 110 %0 = load i32, i32* %a 111 %1 = sitofp i32 %0 to double 112 ret double %1 113 } 114 115 define double @int_to_double_rm_optsize(i32* %a) optsize { 116 ; SSE2-LABEL: int_to_double_rm_optsize: 117 ; SSE2: # %bb.0: # %entry 118 ; SSE2-NEXT: cvtsi2sdl (%rdi), %xmm0 119 ; SSE2-NEXT: retq 120 ; 121 ; AVX-LABEL: int_to_double_rm_optsize: 122 ; AVX: # %bb.0: # %entry 123 ; AVX-NEXT: vcvtsi2sdl (%rdi), %xmm0, %xmm0 124 ; AVX-NEXT: retq 125 ; 126 ; SSE2_X86-LABEL: int_to_double_rm_optsize: 127 ; SSE2_X86: # %bb.0: # %entry 128 ; SSE2_X86-NEXT: pushl %ebp 129 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8 130 ; SSE2_X86-NEXT: .cfi_offset %ebp, -8 131 ; SSE2_X86-NEXT: movl %esp, %ebp 132 ; SSE2_X86-NEXT: .cfi_def_cfa_register %ebp 133 ; SSE2_X86-NEXT: andl $-8, %esp 134 ; SSE2_X86-NEXT: subl $8, %esp 135 ; SSE2_X86-NEXT: movl 8(%ebp), %eax 136 ; SSE2_X86-NEXT: cvtsi2sdl (%eax), %xmm0 137 ; SSE2_X86-NEXT: movsd %xmm0, (%esp) 138 ; SSE2_X86-NEXT: fldl (%esp) 139 ; SSE2_X86-NEXT: movl %ebp, %esp 140 ; SSE2_X86-NEXT: popl %ebp 141 ; SSE2_X86-NEXT: .cfi_def_cfa %esp, 4 142 ; SSE2_X86-NEXT: retl 143 ; 144 ; AVX_X86-LABEL: int_to_double_rm_optsize: 145 ; AVX_X86: # %bb.0: # %entry 146 ; AVX_X86-NEXT: pushl %ebp 147 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8 148 ; AVX_X86-NEXT: .cfi_offset %ebp, -8 149 ; AVX_X86-NEXT: movl %esp, %ebp 150 ; AVX_X86-NEXT: .cfi_def_cfa_register %ebp 151 ; AVX_X86-NEXT: andl $-8, %esp 152 ; AVX_X86-NEXT: subl $8, %esp 153 ; AVX_X86-NEXT: movl 8(%ebp), %eax 154 ; AVX_X86-NEXT: vcvtsi2sdl (%eax), %xmm0, %xmm0 155 ; AVX_X86-NEXT: vmovsd %xmm0, (%esp) 156 ; AVX_X86-NEXT: fldl (%esp) 157 ; AVX_X86-NEXT: movl %ebp, %esp 158 ; AVX_X86-NEXT: popl %ebp 159 ; AVX_X86-NEXT: .cfi_def_cfa %esp, 4 160 ; AVX_X86-NEXT: retl 161 entry: 162 %0 = load i32, i32* %a 163 %1 = sitofp i32 %0 to double 164 ret double %1 165 } 166 167 define float @int_to_float_rr(i32 %a) { 168 ; SSE2-LABEL: int_to_float_rr: 169 ; SSE2: # %bb.0: # %entry 170 ; SSE2-NEXT: cvtsi2ssl %edi, %xmm0 171 ; SSE2-NEXT: retq 172 ; 173 ; AVX-LABEL: int_to_float_rr: 174 ; AVX: # %bb.0: # %entry 175 ; AVX-NEXT: vcvtsi2ssl %edi, %xmm0, %xmm0 176 ; AVX-NEXT: retq 177 ; 178 ; SSE2_X86-LABEL: int_to_float_rr: 179 ; SSE2_X86: # %bb.0: # %entry 180 ; SSE2_X86-NEXT: pushl %eax 181 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8 182 ; SSE2_X86-NEXT: movl {{[0-9]+}}(%esp), %eax 183 ; SSE2_X86-NEXT: cvtsi2ssl %eax, %xmm0 184 ; SSE2_X86-NEXT: movss %xmm0, (%esp) 185 ; SSE2_X86-NEXT: flds (%esp) 186 ; SSE2_X86-NEXT: popl %eax 187 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 4 188 ; SSE2_X86-NEXT: retl 189 ; 190 ; AVX_X86-LABEL: int_to_float_rr: 191 ; AVX_X86: # %bb.0: # %entry 192 ; AVX_X86-NEXT: pushl %eax 193 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8 194 ; AVX_X86-NEXT: movl {{[0-9]+}}(%esp), %eax 195 ; AVX_X86-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 196 ; AVX_X86-NEXT: vmovss %xmm0, (%esp) 197 ; AVX_X86-NEXT: flds (%esp) 198 ; AVX_X86-NEXT: popl %eax 199 ; AVX_X86-NEXT: .cfi_def_cfa_offset 4 200 ; AVX_X86-NEXT: retl 201 entry: 202 %0 = sitofp i32 %a to float 203 ret float %0 204 } 205 206 define float @int_to_float_rm(i32* %a) { 207 ; SSE2-LABEL: int_to_float_rm: 208 ; SSE2: # %bb.0: # %entry 209 ; SSE2-NEXT: movl (%rdi), %eax 210 ; SSE2-NEXT: cvtsi2ssl %eax, %xmm0 211 ; SSE2-NEXT: retq 212 ; 213 ; AVX-LABEL: int_to_float_rm: 214 ; AVX: # %bb.0: # %entry 215 ; AVX-NEXT: movl (%rdi), %eax 216 ; AVX-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 217 ; AVX-NEXT: retq 218 ; 219 ; SSE2_X86-LABEL: int_to_float_rm: 220 ; SSE2_X86: # %bb.0: # %entry 221 ; SSE2_X86-NEXT: pushl %eax 222 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8 223 ; SSE2_X86-NEXT: movl {{[0-9]+}}(%esp), %eax 224 ; SSE2_X86-NEXT: cvtsi2ssl (%eax), %xmm0 225 ; SSE2_X86-NEXT: movss %xmm0, (%esp) 226 ; SSE2_X86-NEXT: flds (%esp) 227 ; SSE2_X86-NEXT: popl %eax 228 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 4 229 ; SSE2_X86-NEXT: retl 230 ; 231 ; AVX_X86-LABEL: int_to_float_rm: 232 ; AVX_X86: # %bb.0: # %entry 233 ; AVX_X86-NEXT: pushl %eax 234 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8 235 ; AVX_X86-NEXT: movl {{[0-9]+}}(%esp), %eax 236 ; AVX_X86-NEXT: vcvtsi2ssl (%eax), %xmm0, %xmm0 237 ; AVX_X86-NEXT: vmovss %xmm0, (%esp) 238 ; AVX_X86-NEXT: flds (%esp) 239 ; AVX_X86-NEXT: popl %eax 240 ; AVX_X86-NEXT: .cfi_def_cfa_offset 4 241 ; AVX_X86-NEXT: retl 242 entry: 243 %0 = load i32, i32* %a 244 %1 = sitofp i32 %0 to float 245 ret float %1 246 } 247 248 define float @int_to_float_rm_optsize(i32* %a) optsize { 249 ; SSE2-LABEL: int_to_float_rm_optsize: 250 ; SSE2: # %bb.0: # %entry 251 ; SSE2-NEXT: cvtsi2ssl (%rdi), %xmm0 252 ; SSE2-NEXT: retq 253 ; 254 ; AVX-LABEL: int_to_float_rm_optsize: 255 ; AVX: # %bb.0: # %entry 256 ; AVX-NEXT: vcvtsi2ssl (%rdi), %xmm0, %xmm0 257 ; AVX-NEXT: retq 258 ; 259 ; SSE2_X86-LABEL: int_to_float_rm_optsize: 260 ; SSE2_X86: # %bb.0: # %entry 261 ; SSE2_X86-NEXT: pushl %eax 262 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 8 263 ; SSE2_X86-NEXT: movl {{[0-9]+}}(%esp), %eax 264 ; SSE2_X86-NEXT: cvtsi2ssl (%eax), %xmm0 265 ; SSE2_X86-NEXT: movss %xmm0, (%esp) 266 ; SSE2_X86-NEXT: flds (%esp) 267 ; SSE2_X86-NEXT: popl %eax 268 ; SSE2_X86-NEXT: .cfi_def_cfa_offset 4 269 ; SSE2_X86-NEXT: retl 270 ; 271 ; AVX_X86-LABEL: int_to_float_rm_optsize: 272 ; AVX_X86: # %bb.0: # %entry 273 ; AVX_X86-NEXT: pushl %eax 274 ; AVX_X86-NEXT: .cfi_def_cfa_offset 8 275 ; AVX_X86-NEXT: movl {{[0-9]+}}(%esp), %eax 276 ; AVX_X86-NEXT: vcvtsi2ssl (%eax), %xmm0, %xmm0 277 ; AVX_X86-NEXT: vmovss %xmm0, (%esp) 278 ; AVX_X86-NEXT: flds (%esp) 279 ; AVX_X86-NEXT: popl %eax 280 ; AVX_X86-NEXT: .cfi_def_cfa_offset 4 281 ; AVX_X86-NEXT: retl 282 entry: 283 %0 = load i32, i32* %a 284 %1 = sitofp i32 %0 to float 285 ret float %1 286 } 287
