1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=SSE 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE 4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefix=AVX 5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=AVX 6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefix=AVX512 7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx512f | FileCheck %s --check-prefix=AVX512 8 9 ; Test all cmp predicates that can be used with SSE. 10 11 define float @select_fcmp_oeq_f32(float %a, float %b, float %c, float %d) { 12 ; SSE-LABEL: select_fcmp_oeq_f32: 13 ; SSE: # %bb.0: 14 ; SSE-NEXT: cmpeqss %xmm1, %xmm0 15 ; SSE-NEXT: andps %xmm0, %xmm2 16 ; SSE-NEXT: andnps %xmm3, %xmm0 17 ; SSE-NEXT: orps %xmm2, %xmm0 18 ; SSE-NEXT: retq 19 ; 20 ; AVX-LABEL: select_fcmp_oeq_f32: 21 ; AVX: # %bb.0: 22 ; AVX-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0 23 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 24 ; AVX-NEXT: retq 25 ; 26 ; AVX512-LABEL: select_fcmp_oeq_f32: 27 ; AVX512: # %bb.0: 28 ; AVX512-NEXT: vcmpeqss %xmm1, %xmm0, %k1 29 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 30 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 31 ; AVX512-NEXT: retq 32 %1 = fcmp oeq float %a, %b 33 %2 = select i1 %1, float %c, float %d 34 ret float %2 35 } 36 37 define double @select_fcmp_oeq_f64(double %a, double %b, double %c, double %d) { 38 ; SSE-LABEL: select_fcmp_oeq_f64: 39 ; SSE: # %bb.0: 40 ; SSE-NEXT: cmpeqsd %xmm1, %xmm0 41 ; SSE-NEXT: andpd %xmm0, %xmm2 42 ; SSE-NEXT: andnpd %xmm3, %xmm0 43 ; SSE-NEXT: orpd %xmm2, %xmm0 44 ; SSE-NEXT: retq 45 ; 46 ; AVX-LABEL: select_fcmp_oeq_f64: 47 ; AVX: # %bb.0: 48 ; AVX-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0 49 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 50 ; AVX-NEXT: retq 51 ; 52 ; AVX512-LABEL: select_fcmp_oeq_f64: 53 ; AVX512: # %bb.0: 54 ; AVX512-NEXT: vcmpeqsd %xmm1, %xmm0, %k1 55 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 56 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 57 ; AVX512-NEXT: retq 58 %1 = fcmp oeq double %a, %b 59 %2 = select i1 %1, double %c, double %d 60 ret double %2 61 } 62 63 define float @select_fcmp_ogt_f32(float %a, float %b, float %c, float %d) { 64 ; SSE-LABEL: select_fcmp_ogt_f32: 65 ; SSE: # %bb.0: 66 ; SSE-NEXT: cmpltss %xmm0, %xmm1 67 ; SSE-NEXT: andps %xmm1, %xmm2 68 ; SSE-NEXT: andnps %xmm3, %xmm1 69 ; SSE-NEXT: orps %xmm2, %xmm1 70 ; SSE-NEXT: movaps %xmm1, %xmm0 71 ; SSE-NEXT: retq 72 ; 73 ; AVX-LABEL: select_fcmp_ogt_f32: 74 ; AVX: # %bb.0: 75 ; AVX-NEXT: vcmpltss %xmm0, %xmm1, %xmm0 76 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 77 ; AVX-NEXT: retq 78 ; 79 ; AVX512-LABEL: select_fcmp_ogt_f32: 80 ; AVX512: # %bb.0: 81 ; AVX512-NEXT: vcmpltss %xmm0, %xmm1, %k1 82 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 83 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 84 ; AVX512-NEXT: retq 85 %1 = fcmp ogt float %a, %b 86 %2 = select i1 %1, float %c, float %d 87 ret float %2 88 } 89 90 define double @select_fcmp_ogt_f64(double %a, double %b, double %c, double %d) { 91 ; SSE-LABEL: select_fcmp_ogt_f64: 92 ; SSE: # %bb.0: 93 ; SSE-NEXT: cmpltsd %xmm0, %xmm1 94 ; SSE-NEXT: andpd %xmm1, %xmm2 95 ; SSE-NEXT: andnpd %xmm3, %xmm1 96 ; SSE-NEXT: orpd %xmm2, %xmm1 97 ; SSE-NEXT: movapd %xmm1, %xmm0 98 ; SSE-NEXT: retq 99 ; 100 ; AVX-LABEL: select_fcmp_ogt_f64: 101 ; AVX: # %bb.0: 102 ; AVX-NEXT: vcmpltsd %xmm0, %xmm1, %xmm0 103 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 104 ; AVX-NEXT: retq 105 ; 106 ; AVX512-LABEL: select_fcmp_ogt_f64: 107 ; AVX512: # %bb.0: 108 ; AVX512-NEXT: vcmpltsd %xmm0, %xmm1, %k1 109 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 110 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 111 ; AVX512-NEXT: retq 112 %1 = fcmp ogt double %a, %b 113 %2 = select i1 %1, double %c, double %d 114 ret double %2 115 } 116 117 define float @select_fcmp_oge_f32(float %a, float %b, float %c, float %d) { 118 ; SSE-LABEL: select_fcmp_oge_f32: 119 ; SSE: # %bb.0: 120 ; SSE-NEXT: cmpless %xmm0, %xmm1 121 ; SSE-NEXT: andps %xmm1, %xmm2 122 ; SSE-NEXT: andnps %xmm3, %xmm1 123 ; SSE-NEXT: orps %xmm2, %xmm1 124 ; SSE-NEXT: movaps %xmm1, %xmm0 125 ; SSE-NEXT: retq 126 ; 127 ; AVX-LABEL: select_fcmp_oge_f32: 128 ; AVX: # %bb.0: 129 ; AVX-NEXT: vcmpless %xmm0, %xmm1, %xmm0 130 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 131 ; AVX-NEXT: retq 132 ; 133 ; AVX512-LABEL: select_fcmp_oge_f32: 134 ; AVX512: # %bb.0: 135 ; AVX512-NEXT: vcmpless %xmm0, %xmm1, %k1 136 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 137 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 138 ; AVX512-NEXT: retq 139 %1 = fcmp oge float %a, %b 140 %2 = select i1 %1, float %c, float %d 141 ret float %2 142 } 143 144 define double @select_fcmp_oge_f64(double %a, double %b, double %c, double %d) { 145 ; SSE-LABEL: select_fcmp_oge_f64: 146 ; SSE: # %bb.0: 147 ; SSE-NEXT: cmplesd %xmm0, %xmm1 148 ; SSE-NEXT: andpd %xmm1, %xmm2 149 ; SSE-NEXT: andnpd %xmm3, %xmm1 150 ; SSE-NEXT: orpd %xmm2, %xmm1 151 ; SSE-NEXT: movapd %xmm1, %xmm0 152 ; SSE-NEXT: retq 153 ; 154 ; AVX-LABEL: select_fcmp_oge_f64: 155 ; AVX: # %bb.0: 156 ; AVX-NEXT: vcmplesd %xmm0, %xmm1, %xmm0 157 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 158 ; AVX-NEXT: retq 159 ; 160 ; AVX512-LABEL: select_fcmp_oge_f64: 161 ; AVX512: # %bb.0: 162 ; AVX512-NEXT: vcmplesd %xmm0, %xmm1, %k1 163 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 164 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 165 ; AVX512-NEXT: retq 166 %1 = fcmp oge double %a, %b 167 %2 = select i1 %1, double %c, double %d 168 ret double %2 169 } 170 171 define float @select_fcmp_olt_f32(float %a, float %b, float %c, float %d) { 172 ; SSE-LABEL: select_fcmp_olt_f32: 173 ; SSE: # %bb.0: 174 ; SSE-NEXT: cmpltss %xmm1, %xmm0 175 ; SSE-NEXT: andps %xmm0, %xmm2 176 ; SSE-NEXT: andnps %xmm3, %xmm0 177 ; SSE-NEXT: orps %xmm2, %xmm0 178 ; SSE-NEXT: retq 179 ; 180 ; AVX-LABEL: select_fcmp_olt_f32: 181 ; AVX: # %bb.0: 182 ; AVX-NEXT: vcmpltss %xmm1, %xmm0, %xmm0 183 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 184 ; AVX-NEXT: retq 185 ; 186 ; AVX512-LABEL: select_fcmp_olt_f32: 187 ; AVX512: # %bb.0: 188 ; AVX512-NEXT: vcmpltss %xmm1, %xmm0, %k1 189 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 190 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 191 ; AVX512-NEXT: retq 192 %1 = fcmp olt float %a, %b 193 %2 = select i1 %1, float %c, float %d 194 ret float %2 195 } 196 197 define double @select_fcmp_olt_f64(double %a, double %b, double %c, double %d) { 198 ; SSE-LABEL: select_fcmp_olt_f64: 199 ; SSE: # %bb.0: 200 ; SSE-NEXT: cmpltsd %xmm1, %xmm0 201 ; SSE-NEXT: andpd %xmm0, %xmm2 202 ; SSE-NEXT: andnpd %xmm3, %xmm0 203 ; SSE-NEXT: orpd %xmm2, %xmm0 204 ; SSE-NEXT: retq 205 ; 206 ; AVX-LABEL: select_fcmp_olt_f64: 207 ; AVX: # %bb.0: 208 ; AVX-NEXT: vcmpltsd %xmm1, %xmm0, %xmm0 209 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 210 ; AVX-NEXT: retq 211 ; 212 ; AVX512-LABEL: select_fcmp_olt_f64: 213 ; AVX512: # %bb.0: 214 ; AVX512-NEXT: vcmpltsd %xmm1, %xmm0, %k1 215 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 216 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 217 ; AVX512-NEXT: retq 218 %1 = fcmp olt double %a, %b 219 %2 = select i1 %1, double %c, double %d 220 ret double %2 221 } 222 223 define float @select_fcmp_ole_f32(float %a, float %b, float %c, float %d) { 224 ; SSE-LABEL: select_fcmp_ole_f32: 225 ; SSE: # %bb.0: 226 ; SSE-NEXT: cmpless %xmm1, %xmm0 227 ; SSE-NEXT: andps %xmm0, %xmm2 228 ; SSE-NEXT: andnps %xmm3, %xmm0 229 ; SSE-NEXT: orps %xmm2, %xmm0 230 ; SSE-NEXT: retq 231 ; 232 ; AVX-LABEL: select_fcmp_ole_f32: 233 ; AVX: # %bb.0: 234 ; AVX-NEXT: vcmpless %xmm1, %xmm0, %xmm0 235 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 236 ; AVX-NEXT: retq 237 ; 238 ; AVX512-LABEL: select_fcmp_ole_f32: 239 ; AVX512: # %bb.0: 240 ; AVX512-NEXT: vcmpless %xmm1, %xmm0, %k1 241 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 242 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 243 ; AVX512-NEXT: retq 244 %1 = fcmp ole float %a, %b 245 %2 = select i1 %1, float %c, float %d 246 ret float %2 247 } 248 249 define double @select_fcmp_ole_f64(double %a, double %b, double %c, double %d) { 250 ; SSE-LABEL: select_fcmp_ole_f64: 251 ; SSE: # %bb.0: 252 ; SSE-NEXT: cmplesd %xmm1, %xmm0 253 ; SSE-NEXT: andpd %xmm0, %xmm2 254 ; SSE-NEXT: andnpd %xmm3, %xmm0 255 ; SSE-NEXT: orpd %xmm2, %xmm0 256 ; SSE-NEXT: retq 257 ; 258 ; AVX-LABEL: select_fcmp_ole_f64: 259 ; AVX: # %bb.0: 260 ; AVX-NEXT: vcmplesd %xmm1, %xmm0, %xmm0 261 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 262 ; AVX-NEXT: retq 263 ; 264 ; AVX512-LABEL: select_fcmp_ole_f64: 265 ; AVX512: # %bb.0: 266 ; AVX512-NEXT: vcmplesd %xmm1, %xmm0, %k1 267 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 268 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 269 ; AVX512-NEXT: retq 270 %1 = fcmp ole double %a, %b 271 %2 = select i1 %1, double %c, double %d 272 ret double %2 273 } 274 275 define float @select_fcmp_ord_f32(float %a, float %b, float %c, float %d) { 276 ; SSE-LABEL: select_fcmp_ord_f32: 277 ; SSE: # %bb.0: 278 ; SSE-NEXT: cmpordss %xmm1, %xmm0 279 ; SSE-NEXT: andps %xmm0, %xmm2 280 ; SSE-NEXT: andnps %xmm3, %xmm0 281 ; SSE-NEXT: orps %xmm2, %xmm0 282 ; SSE-NEXT: retq 283 ; 284 ; AVX-LABEL: select_fcmp_ord_f32: 285 ; AVX: # %bb.0: 286 ; AVX-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 287 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 288 ; AVX-NEXT: retq 289 ; 290 ; AVX512-LABEL: select_fcmp_ord_f32: 291 ; AVX512: # %bb.0: 292 ; AVX512-NEXT: vcmpordss %xmm1, %xmm0, %k1 293 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 294 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 295 ; AVX512-NEXT: retq 296 %1 = fcmp ord float %a, %b 297 %2 = select i1 %1, float %c, float %d 298 ret float %2 299 } 300 301 define double @select_fcmp_ord_f64(double %a, double %b, double %c, double %d) { 302 ; SSE-LABEL: select_fcmp_ord_f64: 303 ; SSE: # %bb.0: 304 ; SSE-NEXT: cmpordsd %xmm1, %xmm0 305 ; SSE-NEXT: andpd %xmm0, %xmm2 306 ; SSE-NEXT: andnpd %xmm3, %xmm0 307 ; SSE-NEXT: orpd %xmm2, %xmm0 308 ; SSE-NEXT: retq 309 ; 310 ; AVX-LABEL: select_fcmp_ord_f64: 311 ; AVX: # %bb.0: 312 ; AVX-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 313 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 314 ; AVX-NEXT: retq 315 ; 316 ; AVX512-LABEL: select_fcmp_ord_f64: 317 ; AVX512: # %bb.0: 318 ; AVX512-NEXT: vcmpordsd %xmm1, %xmm0, %k1 319 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 320 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 321 ; AVX512-NEXT: retq 322 %1 = fcmp ord double %a, %b 323 %2 = select i1 %1, double %c, double %d 324 ret double %2 325 } 326 327 define float @select_fcmp_uno_f32(float %a, float %b, float %c, float %d) { 328 ; SSE-LABEL: select_fcmp_uno_f32: 329 ; SSE: # %bb.0: 330 ; SSE-NEXT: cmpunordss %xmm1, %xmm0 331 ; SSE-NEXT: andps %xmm0, %xmm2 332 ; SSE-NEXT: andnps %xmm3, %xmm0 333 ; SSE-NEXT: orps %xmm2, %xmm0 334 ; SSE-NEXT: retq 335 ; 336 ; AVX-LABEL: select_fcmp_uno_f32: 337 ; AVX: # %bb.0: 338 ; AVX-NEXT: vcmpunordss %xmm1, %xmm0, %xmm0 339 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 340 ; AVX-NEXT: retq 341 ; 342 ; AVX512-LABEL: select_fcmp_uno_f32: 343 ; AVX512: # %bb.0: 344 ; AVX512-NEXT: vcmpunordss %xmm1, %xmm0, %k1 345 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 346 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 347 ; AVX512-NEXT: retq 348 %1 = fcmp uno float %a, %b 349 %2 = select i1 %1, float %c, float %d 350 ret float %2 351 } 352 353 define double @select_fcmp_uno_f64(double %a, double %b, double %c, double %d) { 354 ; SSE-LABEL: select_fcmp_uno_f64: 355 ; SSE: # %bb.0: 356 ; SSE-NEXT: cmpunordsd %xmm1, %xmm0 357 ; SSE-NEXT: andpd %xmm0, %xmm2 358 ; SSE-NEXT: andnpd %xmm3, %xmm0 359 ; SSE-NEXT: orpd %xmm2, %xmm0 360 ; SSE-NEXT: retq 361 ; 362 ; AVX-LABEL: select_fcmp_uno_f64: 363 ; AVX: # %bb.0: 364 ; AVX-NEXT: vcmpunordsd %xmm1, %xmm0, %xmm0 365 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 366 ; AVX-NEXT: retq 367 ; 368 ; AVX512-LABEL: select_fcmp_uno_f64: 369 ; AVX512: # %bb.0: 370 ; AVX512-NEXT: vcmpunordsd %xmm1, %xmm0, %k1 371 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 372 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 373 ; AVX512-NEXT: retq 374 %1 = fcmp uno double %a, %b 375 %2 = select i1 %1, double %c, double %d 376 ret double %2 377 } 378 379 define float @select_fcmp_ugt_f32(float %a, float %b, float %c, float %d) { 380 ; SSE-LABEL: select_fcmp_ugt_f32: 381 ; SSE: # %bb.0: 382 ; SSE-NEXT: cmpnless %xmm1, %xmm0 383 ; SSE-NEXT: andps %xmm0, %xmm2 384 ; SSE-NEXT: andnps %xmm3, %xmm0 385 ; SSE-NEXT: orps %xmm2, %xmm0 386 ; SSE-NEXT: retq 387 ; 388 ; AVX-LABEL: select_fcmp_ugt_f32: 389 ; AVX: # %bb.0: 390 ; AVX-NEXT: vcmpnless %xmm1, %xmm0, %xmm0 391 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 392 ; AVX-NEXT: retq 393 ; 394 ; AVX512-LABEL: select_fcmp_ugt_f32: 395 ; AVX512: # %bb.0: 396 ; AVX512-NEXT: vcmpnless %xmm1, %xmm0, %k1 397 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 398 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 399 ; AVX512-NEXT: retq 400 %1 = fcmp ugt float %a, %b 401 %2 = select i1 %1, float %c, float %d 402 ret float %2 403 } 404 405 define double @select_fcmp_ugt_f64(double %a, double %b, double %c, double %d) { 406 ; SSE-LABEL: select_fcmp_ugt_f64: 407 ; SSE: # %bb.0: 408 ; SSE-NEXT: cmpnlesd %xmm1, %xmm0 409 ; SSE-NEXT: andpd %xmm0, %xmm2 410 ; SSE-NEXT: andnpd %xmm3, %xmm0 411 ; SSE-NEXT: orpd %xmm2, %xmm0 412 ; SSE-NEXT: retq 413 ; 414 ; AVX-LABEL: select_fcmp_ugt_f64: 415 ; AVX: # %bb.0: 416 ; AVX-NEXT: vcmpnlesd %xmm1, %xmm0, %xmm0 417 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 418 ; AVX-NEXT: retq 419 ; 420 ; AVX512-LABEL: select_fcmp_ugt_f64: 421 ; AVX512: # %bb.0: 422 ; AVX512-NEXT: vcmpnlesd %xmm1, %xmm0, %k1 423 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 424 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 425 ; AVX512-NEXT: retq 426 %1 = fcmp ugt double %a, %b 427 %2 = select i1 %1, double %c, double %d 428 ret double %2 429 } 430 431 define float @select_fcmp_uge_f32(float %a, float %b, float %c, float %d) { 432 ; SSE-LABEL: select_fcmp_uge_f32: 433 ; SSE: # %bb.0: 434 ; SSE-NEXT: cmpnltss %xmm1, %xmm0 435 ; SSE-NEXT: andps %xmm0, %xmm2 436 ; SSE-NEXT: andnps %xmm3, %xmm0 437 ; SSE-NEXT: orps %xmm2, %xmm0 438 ; SSE-NEXT: retq 439 ; 440 ; AVX-LABEL: select_fcmp_uge_f32: 441 ; AVX: # %bb.0: 442 ; AVX-NEXT: vcmpnltss %xmm1, %xmm0, %xmm0 443 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 444 ; AVX-NEXT: retq 445 ; 446 ; AVX512-LABEL: select_fcmp_uge_f32: 447 ; AVX512: # %bb.0: 448 ; AVX512-NEXT: vcmpnltss %xmm1, %xmm0, %k1 449 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 450 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 451 ; AVX512-NEXT: retq 452 %1 = fcmp uge float %a, %b 453 %2 = select i1 %1, float %c, float %d 454 ret float %2 455 } 456 457 define double @select_fcmp_uge_f64(double %a, double %b, double %c, double %d) { 458 ; SSE-LABEL: select_fcmp_uge_f64: 459 ; SSE: # %bb.0: 460 ; SSE-NEXT: cmpnltsd %xmm1, %xmm0 461 ; SSE-NEXT: andpd %xmm0, %xmm2 462 ; SSE-NEXT: andnpd %xmm3, %xmm0 463 ; SSE-NEXT: orpd %xmm2, %xmm0 464 ; SSE-NEXT: retq 465 ; 466 ; AVX-LABEL: select_fcmp_uge_f64: 467 ; AVX: # %bb.0: 468 ; AVX-NEXT: vcmpnltsd %xmm1, %xmm0, %xmm0 469 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 470 ; AVX-NEXT: retq 471 ; 472 ; AVX512-LABEL: select_fcmp_uge_f64: 473 ; AVX512: # %bb.0: 474 ; AVX512-NEXT: vcmpnltsd %xmm1, %xmm0, %k1 475 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 476 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 477 ; AVX512-NEXT: retq 478 %1 = fcmp uge double %a, %b 479 %2 = select i1 %1, double %c, double %d 480 ret double %2 481 } 482 483 define float @select_fcmp_ult_f32(float %a, float %b, float %c, float %d) { 484 ; SSE-LABEL: select_fcmp_ult_f32: 485 ; SSE: # %bb.0: 486 ; SSE-NEXT: cmpnless %xmm0, %xmm1 487 ; SSE-NEXT: andps %xmm1, %xmm2 488 ; SSE-NEXT: andnps %xmm3, %xmm1 489 ; SSE-NEXT: orps %xmm2, %xmm1 490 ; SSE-NEXT: movaps %xmm1, %xmm0 491 ; SSE-NEXT: retq 492 ; 493 ; AVX-LABEL: select_fcmp_ult_f32: 494 ; AVX: # %bb.0: 495 ; AVX-NEXT: vcmpnless %xmm0, %xmm1, %xmm0 496 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 497 ; AVX-NEXT: retq 498 ; 499 ; AVX512-LABEL: select_fcmp_ult_f32: 500 ; AVX512: # %bb.0: 501 ; AVX512-NEXT: vcmpnless %xmm0, %xmm1, %k1 502 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 503 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 504 ; AVX512-NEXT: retq 505 %1 = fcmp ult float %a, %b 506 %2 = select i1 %1, float %c, float %d 507 ret float %2 508 } 509 510 define double @select_fcmp_ult_f64(double %a, double %b, double %c, double %d) { 511 ; SSE-LABEL: select_fcmp_ult_f64: 512 ; SSE: # %bb.0: 513 ; SSE-NEXT: cmpnlesd %xmm0, %xmm1 514 ; SSE-NEXT: andpd %xmm1, %xmm2 515 ; SSE-NEXT: andnpd %xmm3, %xmm1 516 ; SSE-NEXT: orpd %xmm2, %xmm1 517 ; SSE-NEXT: movapd %xmm1, %xmm0 518 ; SSE-NEXT: retq 519 ; 520 ; AVX-LABEL: select_fcmp_ult_f64: 521 ; AVX: # %bb.0: 522 ; AVX-NEXT: vcmpnlesd %xmm0, %xmm1, %xmm0 523 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 524 ; AVX-NEXT: retq 525 ; 526 ; AVX512-LABEL: select_fcmp_ult_f64: 527 ; AVX512: # %bb.0: 528 ; AVX512-NEXT: vcmpnlesd %xmm0, %xmm1, %k1 529 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 530 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 531 ; AVX512-NEXT: retq 532 %1 = fcmp ult double %a, %b 533 %2 = select i1 %1, double %c, double %d 534 ret double %2 535 } 536 537 define float @select_fcmp_ule_f32(float %a, float %b, float %c, float %d) { 538 ; SSE-LABEL: select_fcmp_ule_f32: 539 ; SSE: # %bb.0: 540 ; SSE-NEXT: cmpnltss %xmm0, %xmm1 541 ; SSE-NEXT: andps %xmm1, %xmm2 542 ; SSE-NEXT: andnps %xmm3, %xmm1 543 ; SSE-NEXT: orps %xmm2, %xmm1 544 ; SSE-NEXT: movaps %xmm1, %xmm0 545 ; SSE-NEXT: retq 546 ; 547 ; AVX-LABEL: select_fcmp_ule_f32: 548 ; AVX: # %bb.0: 549 ; AVX-NEXT: vcmpnltss %xmm0, %xmm1, %xmm0 550 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 551 ; AVX-NEXT: retq 552 ; 553 ; AVX512-LABEL: select_fcmp_ule_f32: 554 ; AVX512: # %bb.0: 555 ; AVX512-NEXT: vcmpnltss %xmm0, %xmm1, %k1 556 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 557 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 558 ; AVX512-NEXT: retq 559 %1 = fcmp ule float %a, %b 560 %2 = select i1 %1, float %c, float %d 561 ret float %2 562 } 563 564 define double @select_fcmp_ule_f64(double %a, double %b, double %c, double %d) { 565 ; SSE-LABEL: select_fcmp_ule_f64: 566 ; SSE: # %bb.0: 567 ; SSE-NEXT: cmpnltsd %xmm0, %xmm1 568 ; SSE-NEXT: andpd %xmm1, %xmm2 569 ; SSE-NEXT: andnpd %xmm3, %xmm1 570 ; SSE-NEXT: orpd %xmm2, %xmm1 571 ; SSE-NEXT: movapd %xmm1, %xmm0 572 ; SSE-NEXT: retq 573 ; 574 ; AVX-LABEL: select_fcmp_ule_f64: 575 ; AVX: # %bb.0: 576 ; AVX-NEXT: vcmpnltsd %xmm0, %xmm1, %xmm0 577 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 578 ; AVX-NEXT: retq 579 ; 580 ; AVX512-LABEL: select_fcmp_ule_f64: 581 ; AVX512: # %bb.0: 582 ; AVX512-NEXT: vcmpnltsd %xmm0, %xmm1, %k1 583 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 584 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 585 ; AVX512-NEXT: retq 586 %1 = fcmp ule double %a, %b 587 %2 = select i1 %1, double %c, double %d 588 ret double %2 589 } 590 591 define float @select_fcmp_une_f32(float %a, float %b, float %c, float %d) { 592 ; SSE-LABEL: select_fcmp_une_f32: 593 ; SSE: # %bb.0: 594 ; SSE-NEXT: cmpneqss %xmm1, %xmm0 595 ; SSE-NEXT: andps %xmm0, %xmm2 596 ; SSE-NEXT: andnps %xmm3, %xmm0 597 ; SSE-NEXT: orps %xmm2, %xmm0 598 ; SSE-NEXT: retq 599 ; 600 ; AVX-LABEL: select_fcmp_une_f32: 601 ; AVX: # %bb.0: 602 ; AVX-NEXT: vcmpneqss %xmm1, %xmm0, %xmm0 603 ; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm3, %xmm0 604 ; AVX-NEXT: retq 605 ; 606 ; AVX512-LABEL: select_fcmp_une_f32: 607 ; AVX512: # %bb.0: 608 ; AVX512-NEXT: vcmpneqss %xmm1, %xmm0, %k1 609 ; AVX512-NEXT: vmovss %xmm2, %xmm0, %xmm3 {%k1} 610 ; AVX512-NEXT: vmovaps %xmm3, %xmm0 611 ; AVX512-NEXT: retq 612 %1 = fcmp une float %a, %b 613 %2 = select i1 %1, float %c, float %d 614 ret float %2 615 } 616 617 define double @select_fcmp_une_f64(double %a, double %b, double %c, double %d) { 618 ; SSE-LABEL: select_fcmp_une_f64: 619 ; SSE: # %bb.0: 620 ; SSE-NEXT: cmpneqsd %xmm1, %xmm0 621 ; SSE-NEXT: andpd %xmm0, %xmm2 622 ; SSE-NEXT: andnpd %xmm3, %xmm0 623 ; SSE-NEXT: orpd %xmm2, %xmm0 624 ; SSE-NEXT: retq 625 ; 626 ; AVX-LABEL: select_fcmp_une_f64: 627 ; AVX: # %bb.0: 628 ; AVX-NEXT: vcmpneqsd %xmm1, %xmm0, %xmm0 629 ; AVX-NEXT: vblendvpd %xmm0, %xmm2, %xmm3, %xmm0 630 ; AVX-NEXT: retq 631 ; 632 ; AVX512-LABEL: select_fcmp_une_f64: 633 ; AVX512: # %bb.0: 634 ; AVX512-NEXT: vcmpneqsd %xmm1, %xmm0, %k1 635 ; AVX512-NEXT: vmovsd %xmm2, %xmm0, %xmm3 {%k1} 636 ; AVX512-NEXT: vmovapd %xmm3, %xmm0 637 ; AVX512-NEXT: retq 638 %1 = fcmp une double %a, %b 639 %2 = select i1 %1, double %c, double %d 640 ret double %2 641 } 642 643
