1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s 3 4 define i8 @shl_i8(i8 %a, i8 %b) { 5 ; CHECK-LABEL: shl_i8: 6 ; CHECK: ## %bb.0: 7 ; CHECK-NEXT: movl %esi, %ecx 8 ; CHECK-NEXT: shlb %cl, %dil 9 ; CHECK-NEXT: movl %edi, %eax 10 ; CHECK-NEXT: retq 11 %c = shl i8 %a, %b 12 ret i8 %c 13 } 14 15 define i16 @shl_i16(i16 %a, i16 %b) { 16 ; CHECK-LABEL: shl_i16: 17 ; CHECK: ## %bb.0: 18 ; CHECK-NEXT: movl %esi, %ecx 19 ; CHECK-NEXT: ## kill: def $cl killed $cx 20 ; CHECK-NEXT: shlw %cl, %di 21 ; CHECK-NEXT: movl %edi, %eax 22 ; CHECK-NEXT: retq 23 %c = shl i16 %a, %b 24 ret i16 %c 25 } 26 27 define i32 @shl_i32(i32 %a, i32 %b) { 28 ; CHECK-LABEL: shl_i32: 29 ; CHECK: ## %bb.0: 30 ; CHECK-NEXT: movl %esi, %ecx 31 ; CHECK-NEXT: ## kill: def $cl killed $ecx 32 ; CHECK-NEXT: shll %cl, %edi 33 ; CHECK-NEXT: movl %edi, %eax 34 ; CHECK-NEXT: retq 35 %c = shl i32 %a, %b 36 ret i32 %c 37 } 38 39 define i64 @shl_i64(i64 %a, i64 %b) { 40 ; CHECK-LABEL: shl_i64: 41 ; CHECK: ## %bb.0: 42 ; CHECK-NEXT: movq %rsi, %rcx 43 ; CHECK-NEXT: ## kill: def $cl killed $rcx 44 ; CHECK-NEXT: shlq %cl, %rdi 45 ; CHECK-NEXT: movq %rdi, %rax 46 ; CHECK-NEXT: retq 47 %c = shl i64 %a, %b 48 ret i64 %c 49 } 50 51 define i8 @lshr_i8(i8 %a, i8 %b) { 52 ; CHECK-LABEL: lshr_i8: 53 ; CHECK: ## %bb.0: 54 ; CHECK-NEXT: movl %esi, %ecx 55 ; CHECK-NEXT: shrb %cl, %dil 56 ; CHECK-NEXT: movl %edi, %eax 57 ; CHECK-NEXT: retq 58 %c = lshr i8 %a, %b 59 ret i8 %c 60 } 61 62 define i16 @lshr_i16(i16 %a, i16 %b) { 63 ; CHECK-LABEL: lshr_i16: 64 ; CHECK: ## %bb.0: 65 ; CHECK-NEXT: movl %esi, %ecx 66 ; CHECK-NEXT: ## kill: def $cl killed $cx 67 ; CHECK-NEXT: shrw %cl, %di 68 ; CHECK-NEXT: movl %edi, %eax 69 ; CHECK-NEXT: retq 70 %c = lshr i16 %a, %b 71 ret i16 %c 72 } 73 74 define i32 @lshr_i32(i32 %a, i32 %b) { 75 ; CHECK-LABEL: lshr_i32: 76 ; CHECK: ## %bb.0: 77 ; CHECK-NEXT: movl %esi, %ecx 78 ; CHECK-NEXT: ## kill: def $cl killed $ecx 79 ; CHECK-NEXT: shrl %cl, %edi 80 ; CHECK-NEXT: movl %edi, %eax 81 ; CHECK-NEXT: retq 82 %c = lshr i32 %a, %b 83 ret i32 %c 84 } 85 86 define i64 @lshr_i64(i64 %a, i64 %b) { 87 ; CHECK-LABEL: lshr_i64: 88 ; CHECK: ## %bb.0: 89 ; CHECK-NEXT: movq %rsi, %rcx 90 ; CHECK-NEXT: ## kill: def $cl killed $rcx 91 ; CHECK-NEXT: shrq %cl, %rdi 92 ; CHECK-NEXT: movq %rdi, %rax 93 ; CHECK-NEXT: retq 94 %c = lshr i64 %a, %b 95 ret i64 %c 96 } 97 98 define i8 @ashr_i8(i8 %a, i8 %b) { 99 ; CHECK-LABEL: ashr_i8: 100 ; CHECK: ## %bb.0: 101 ; CHECK-NEXT: movl %esi, %ecx 102 ; CHECK-NEXT: sarb %cl, %dil 103 ; CHECK-NEXT: movl %edi, %eax 104 ; CHECK-NEXT: retq 105 %c = ashr i8 %a, %b 106 ret i8 %c 107 } 108 109 define i16 @ashr_i16(i16 %a, i16 %b) { 110 ; CHECK-LABEL: ashr_i16: 111 ; CHECK: ## %bb.0: 112 ; CHECK-NEXT: movl %esi, %ecx 113 ; CHECK-NEXT: ## kill: def $cl killed $cx 114 ; CHECK-NEXT: sarw %cl, %di 115 ; CHECK-NEXT: movl %edi, %eax 116 ; CHECK-NEXT: retq 117 %c = ashr i16 %a, %b 118 ret i16 %c 119 } 120 121 define i32 @ashr_i32(i32 %a, i32 %b) { 122 ; CHECK-LABEL: ashr_i32: 123 ; CHECK: ## %bb.0: 124 ; CHECK-NEXT: movl %esi, %ecx 125 ; CHECK-NEXT: ## kill: def $cl killed $ecx 126 ; CHECK-NEXT: sarl %cl, %edi 127 ; CHECK-NEXT: movl %edi, %eax 128 ; CHECK-NEXT: retq 129 %c = ashr i32 %a, %b 130 ret i32 %c 131 } 132 133 define i64 @ashr_i64(i64 %a, i64 %b) { 134 ; CHECK-LABEL: ashr_i64: 135 ; CHECK: ## %bb.0: 136 ; CHECK-NEXT: movq %rsi, %rcx 137 ; CHECK-NEXT: ## kill: def $cl killed $rcx 138 ; CHECK-NEXT: sarq %cl, %rdi 139 ; CHECK-NEXT: movq %rdi, %rax 140 ; CHECK-NEXT: retq 141 %c = ashr i64 %a, %b 142 ret i64 %c 143 } 144 145 define i8 @shl_imm1_i8(i8 %a) { 146 ; CHECK-LABEL: shl_imm1_i8: 147 ; CHECK: ## %bb.0: 148 ; CHECK-NEXT: shlb $1, %dil 149 ; CHECK-NEXT: movl %edi, %eax 150 ; CHECK-NEXT: retq 151 %c = shl i8 %a, 1 152 ret i8 %c 153 } 154 155 define i16 @shl_imm1_i16(i16 %a) { 156 ; CHECK-LABEL: shl_imm1_i16: 157 ; CHECK: ## %bb.0: 158 ; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi 159 ; CHECK-NEXT: leal (,%rdi,2), %eax 160 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax 161 ; CHECK-NEXT: retq 162 %c = shl i16 %a, 1 163 ret i16 %c 164 } 165 166 define i32 @shl_imm1_i32(i32 %a) { 167 ; CHECK-LABEL: shl_imm1_i32: 168 ; CHECK: ## %bb.0: 169 ; CHECK-NEXT: ## kill: def $edi killed $edi def $rdi 170 ; CHECK-NEXT: leal (,%rdi,2), %eax 171 ; CHECK-NEXT: retq 172 %c = shl i32 %a, 1 173 ret i32 %c 174 } 175 176 define i64 @shl_imm1_i64(i64 %a) { 177 ; CHECK-LABEL: shl_imm1_i64: 178 ; CHECK: ## %bb.0: 179 ; CHECK-NEXT: leaq (,%rdi,2), %rax 180 ; CHECK-NEXT: retq 181 %c = shl i64 %a, 1 182 ret i64 %c 183 } 184 185 define i8 @lshr_imm1_i8(i8 %a) { 186 ; CHECK-LABEL: lshr_imm1_i8: 187 ; CHECK: ## %bb.0: 188 ; CHECK-NEXT: shrb $1, %dil 189 ; CHECK-NEXT: movl %edi, %eax 190 ; CHECK-NEXT: retq 191 %c = lshr i8 %a, 1 192 ret i8 %c 193 } 194 195 define i16 @lshr_imm1_i16(i16 %a) { 196 ; CHECK-LABEL: lshr_imm1_i16: 197 ; CHECK: ## %bb.0: 198 ; CHECK-NEXT: shrw $1, %di 199 ; CHECK-NEXT: movl %edi, %eax 200 ; CHECK-NEXT: retq 201 %c = lshr i16 %a, 1 202 ret i16 %c 203 } 204 205 define i32 @lshr_imm1_i32(i32 %a) { 206 ; CHECK-LABEL: lshr_imm1_i32: 207 ; CHECK: ## %bb.0: 208 ; CHECK-NEXT: shrl $1, %edi 209 ; CHECK-NEXT: movl %edi, %eax 210 ; CHECK-NEXT: retq 211 %c = lshr i32 %a, 1 212 ret i32 %c 213 } 214 215 define i64 @lshr_imm1_i64(i64 %a) { 216 ; CHECK-LABEL: lshr_imm1_i64: 217 ; CHECK: ## %bb.0: 218 ; CHECK-NEXT: shrq $1, %rdi 219 ; CHECK-NEXT: movq %rdi, %rax 220 ; CHECK-NEXT: retq 221 %c = lshr i64 %a, 1 222 ret i64 %c 223 } 224 225 define i8 @ashr_imm1_i8(i8 %a) { 226 ; CHECK-LABEL: ashr_imm1_i8: 227 ; CHECK: ## %bb.0: 228 ; CHECK-NEXT: sarb $1, %dil 229 ; CHECK-NEXT: movl %edi, %eax 230 ; CHECK-NEXT: retq 231 %c = ashr i8 %a, 1 232 ret i8 %c 233 } 234 235 define i16 @ashr_imm1_i16(i16 %a) { 236 ; CHECK-LABEL: ashr_imm1_i16: 237 ; CHECK: ## %bb.0: 238 ; CHECK-NEXT: sarw $1, %di 239 ; CHECK-NEXT: movl %edi, %eax 240 ; CHECK-NEXT: retq 241 %c = ashr i16 %a, 1 242 ret i16 %c 243 } 244 245 define i32 @ashr_imm1_i32(i32 %a) { 246 ; CHECK-LABEL: ashr_imm1_i32: 247 ; CHECK: ## %bb.0: 248 ; CHECK-NEXT: sarl $1, %edi 249 ; CHECK-NEXT: movl %edi, %eax 250 ; CHECK-NEXT: retq 251 %c = ashr i32 %a, 1 252 ret i32 %c 253 } 254 255 define i64 @ashr_imm1_i64(i64 %a) { 256 ; CHECK-LABEL: ashr_imm1_i64: 257 ; CHECK: ## %bb.0: 258 ; CHECK-NEXT: sarq $1, %rdi 259 ; CHECK-NEXT: movq %rdi, %rax 260 ; CHECK-NEXT: retq 261 %c = ashr i64 %a, 1 262 ret i64 %c 263 } 264 265 define i8 @shl_imm4_i8(i8 %a) { 266 ; CHECK-LABEL: shl_imm4_i8: 267 ; CHECK: ## %bb.0: 268 ; CHECK-NEXT: shlb $4, %dil 269 ; CHECK-NEXT: movl %edi, %eax 270 ; CHECK-NEXT: retq 271 %c = shl i8 %a, 4 272 ret i8 %c 273 } 274 275 define i16 @shl_imm4_i16(i16 %a) { 276 ; CHECK-LABEL: shl_imm4_i16: 277 ; CHECK: ## %bb.0: 278 ; CHECK-NEXT: shlw $4, %di 279 ; CHECK-NEXT: movl %edi, %eax 280 ; CHECK-NEXT: retq 281 %c = shl i16 %a, 4 282 ret i16 %c 283 } 284 285 define i32 @shl_imm4_i32(i32 %a) { 286 ; CHECK-LABEL: shl_imm4_i32: 287 ; CHECK: ## %bb.0: 288 ; CHECK-NEXT: shll $4, %edi 289 ; CHECK-NEXT: movl %edi, %eax 290 ; CHECK-NEXT: retq 291 %c = shl i32 %a, 4 292 ret i32 %c 293 } 294 295 define i64 @shl_imm4_i64(i64 %a) { 296 ; CHECK-LABEL: shl_imm4_i64: 297 ; CHECK: ## %bb.0: 298 ; CHECK-NEXT: shlq $4, %rdi 299 ; CHECK-NEXT: movq %rdi, %rax 300 ; CHECK-NEXT: retq 301 %c = shl i64 %a, 4 302 ret i64 %c 303 } 304 305 define i8 @lshr_imm4_i8(i8 %a) { 306 ; CHECK-LABEL: lshr_imm4_i8: 307 ; CHECK: ## %bb.0: 308 ; CHECK-NEXT: shrb $4, %dil 309 ; CHECK-NEXT: movl %edi, %eax 310 ; CHECK-NEXT: retq 311 %c = lshr i8 %a, 4 312 ret i8 %c 313 } 314 315 define i16 @lshr_imm4_i16(i16 %a) { 316 ; CHECK-LABEL: lshr_imm4_i16: 317 ; CHECK: ## %bb.0: 318 ; CHECK-NEXT: shrw $4, %di 319 ; CHECK-NEXT: movl %edi, %eax 320 ; CHECK-NEXT: retq 321 %c = lshr i16 %a, 4 322 ret i16 %c 323 } 324 325 define i32 @lshr_imm4_i32(i32 %a) { 326 ; CHECK-LABEL: lshr_imm4_i32: 327 ; CHECK: ## %bb.0: 328 ; CHECK-NEXT: shrl $4, %edi 329 ; CHECK-NEXT: movl %edi, %eax 330 ; CHECK-NEXT: retq 331 %c = lshr i32 %a, 4 332 ret i32 %c 333 } 334 335 define i64 @lshr_imm4_i64(i64 %a) { 336 ; CHECK-LABEL: lshr_imm4_i64: 337 ; CHECK: ## %bb.0: 338 ; CHECK-NEXT: shrq $4, %rdi 339 ; CHECK-NEXT: movq %rdi, %rax 340 ; CHECK-NEXT: retq 341 %c = lshr i64 %a, 4 342 ret i64 %c 343 } 344 345 define i8 @ashr_imm4_i8(i8 %a) { 346 ; CHECK-LABEL: ashr_imm4_i8: 347 ; CHECK: ## %bb.0: 348 ; CHECK-NEXT: sarb $4, %dil 349 ; CHECK-NEXT: movl %edi, %eax 350 ; CHECK-NEXT: retq 351 %c = ashr i8 %a, 4 352 ret i8 %c 353 } 354 355 define i16 @ashr_imm4_i16(i16 %a) { 356 ; CHECK-LABEL: ashr_imm4_i16: 357 ; CHECK: ## %bb.0: 358 ; CHECK-NEXT: sarw $4, %di 359 ; CHECK-NEXT: movl %edi, %eax 360 ; CHECK-NEXT: retq 361 %c = ashr i16 %a, 4 362 ret i16 %c 363 } 364 365 define i32 @ashr_imm4_i32(i32 %a) { 366 ; CHECK-LABEL: ashr_imm4_i32: 367 ; CHECK: ## %bb.0: 368 ; CHECK-NEXT: sarl $4, %edi 369 ; CHECK-NEXT: movl %edi, %eax 370 ; CHECK-NEXT: retq 371 %c = ashr i32 %a, 4 372 ret i32 %c 373 } 374 375 define i64 @ashr_imm4_i64(i64 %a) { 376 ; CHECK-LABEL: ashr_imm4_i64: 377 ; CHECK: ## %bb.0: 378 ; CHECK-NEXT: sarq $4, %rdi 379 ; CHECK-NEXT: movq %rdi, %rax 380 ; CHECK-NEXT: retq 381 %c = ashr i64 %a, 4 382 ret i64 %c 383 } 384 385 ; Make sure we don't crash on out of bounds i8 shifts. 386 define i8 @PR36731(i8 %a) { 387 ; CHECK-LABEL: PR36731: 388 ; CHECK: ## %bb.0: 389 ; CHECK-NEXT: movb $255, %cl 390 ; CHECK-NEXT: shlb %cl, %dil 391 ; CHECK-NEXT: movl %edi, %eax 392 ; CHECK-NEXT: retq 393 %b = shl i8 %a, -1 394 ret i8 %b 395 } 396
