1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefixes=X86 3 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64 4 5 ; 6 ; FADD 7 ; 8 9 define x86_fp80 @fiadd_fp80_i16(x86_fp80 %a0, i16 %a1) { 10 ; X86-LABEL: fiadd_fp80_i16: 11 ; X86: # %bb.0: 12 ; X86-NEXT: pushl %eax 13 ; X86-NEXT: .cfi_def_cfa_offset 8 14 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 15 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 16 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 17 ; X86-NEXT: fiadds {{[0-9]+}}(%esp) 18 ; X86-NEXT: popl %eax 19 ; X86-NEXT: .cfi_def_cfa_offset 4 20 ; X86-NEXT: retl 21 ; 22 ; X64-LABEL: fiadd_fp80_i16: 23 ; X64: # %bb.0: 24 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 25 ; X64-NEXT: movswl %di, %eax 26 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 27 ; X64-NEXT: fiaddl -{{[0-9]+}}(%rsp) 28 ; X64-NEXT: retq 29 %1 = sitofp i16 %a1 to x86_fp80 30 %2 = fadd x86_fp80 %a0, %1 31 ret x86_fp80 %2 32 } 33 34 define x86_fp80 @fiadd_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) { 35 ; X86-LABEL: fiadd_fp80_i16_ld: 36 ; X86: # %bb.0: 37 ; X86-NEXT: pushl %eax 38 ; X86-NEXT: .cfi_def_cfa_offset 8 39 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 40 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 41 ; X86-NEXT: movzwl (%eax), %eax 42 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 43 ; X86-NEXT: fiadds {{[0-9]+}}(%esp) 44 ; X86-NEXT: popl %eax 45 ; X86-NEXT: .cfi_def_cfa_offset 4 46 ; X86-NEXT: retl 47 ; 48 ; X64-LABEL: fiadd_fp80_i16_ld: 49 ; X64: # %bb.0: 50 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 51 ; X64-NEXT: movswl (%rdi), %eax 52 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 53 ; X64-NEXT: fiaddl -{{[0-9]+}}(%rsp) 54 ; X64-NEXT: retq 55 %1 = load i16, i16 *%a1 56 %2 = sitofp i16 %1 to x86_fp80 57 %3 = fadd x86_fp80 %a0, %2 58 ret x86_fp80 %3 59 } 60 61 define x86_fp80 @fiadd_fp80_i32(x86_fp80 %a0, i32 %a1) { 62 ; X86-LABEL: fiadd_fp80_i32: 63 ; X86: # %bb.0: 64 ; X86-NEXT: pushl %eax 65 ; X86-NEXT: .cfi_def_cfa_offset 8 66 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 67 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 68 ; X86-NEXT: movl %eax, (%esp) 69 ; X86-NEXT: fiaddl (%esp) 70 ; X86-NEXT: popl %eax 71 ; X86-NEXT: .cfi_def_cfa_offset 4 72 ; X86-NEXT: retl 73 ; 74 ; X64-LABEL: fiadd_fp80_i32: 75 ; X64: # %bb.0: 76 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 77 ; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp) 78 ; X64-NEXT: fiaddl -{{[0-9]+}}(%rsp) 79 ; X64-NEXT: retq 80 %1 = sitofp i32 %a1 to x86_fp80 81 %2 = fadd x86_fp80 %a0, %1 82 ret x86_fp80 %2 83 } 84 85 define x86_fp80 @fiadd_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) { 86 ; X86-LABEL: fiadd_fp80_i32_ld: 87 ; X86: # %bb.0: 88 ; X86-NEXT: pushl %eax 89 ; X86-NEXT: .cfi_def_cfa_offset 8 90 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 91 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 92 ; X86-NEXT: movl (%eax), %eax 93 ; X86-NEXT: movl %eax, (%esp) 94 ; X86-NEXT: fiaddl (%esp) 95 ; X86-NEXT: popl %eax 96 ; X86-NEXT: .cfi_def_cfa_offset 4 97 ; X86-NEXT: retl 98 ; 99 ; X64-LABEL: fiadd_fp80_i32_ld: 100 ; X64: # %bb.0: 101 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 102 ; X64-NEXT: movl (%rdi), %eax 103 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 104 ; X64-NEXT: fiaddl -{{[0-9]+}}(%rsp) 105 ; X64-NEXT: retq 106 %1 = load i32, i32 *%a1 107 %2 = sitofp i32 %1 to x86_fp80 108 %3 = fadd x86_fp80 %a0, %2 109 ret x86_fp80 %3 110 } 111 112 ; 113 ; FSUB 114 ; 115 116 define x86_fp80 @fisub_fp80_i16(x86_fp80 %a0, i16 %a1) { 117 ; X86-LABEL: fisub_fp80_i16: 118 ; X86: # %bb.0: 119 ; X86-NEXT: pushl %eax 120 ; X86-NEXT: .cfi_def_cfa_offset 8 121 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 122 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 123 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 124 ; X86-NEXT: fisubs {{[0-9]+}}(%esp) 125 ; X86-NEXT: popl %eax 126 ; X86-NEXT: .cfi_def_cfa_offset 4 127 ; X86-NEXT: retl 128 ; 129 ; X64-LABEL: fisub_fp80_i16: 130 ; X64: # %bb.0: 131 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 132 ; X64-NEXT: movswl %di, %eax 133 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 134 ; X64-NEXT: fisubl -{{[0-9]+}}(%rsp) 135 ; X64-NEXT: retq 136 %1 = sitofp i16 %a1 to x86_fp80 137 %2 = fsub x86_fp80 %a0, %1 138 ret x86_fp80 %2 139 } 140 141 define x86_fp80 @fisub_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) { 142 ; X86-LABEL: fisub_fp80_i16_ld: 143 ; X86: # %bb.0: 144 ; X86-NEXT: pushl %eax 145 ; X86-NEXT: .cfi_def_cfa_offset 8 146 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 147 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 148 ; X86-NEXT: movzwl (%eax), %eax 149 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 150 ; X86-NEXT: fisubs {{[0-9]+}}(%esp) 151 ; X86-NEXT: popl %eax 152 ; X86-NEXT: .cfi_def_cfa_offset 4 153 ; X86-NEXT: retl 154 ; 155 ; X64-LABEL: fisub_fp80_i16_ld: 156 ; X64: # %bb.0: 157 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 158 ; X64-NEXT: movswl (%rdi), %eax 159 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 160 ; X64-NEXT: fisubl -{{[0-9]+}}(%rsp) 161 ; X64-NEXT: retq 162 %1 = load i16, i16 *%a1 163 %2 = sitofp i16 %1 to x86_fp80 164 %3 = fsub x86_fp80 %a0, %2 165 ret x86_fp80 %3 166 } 167 168 define x86_fp80 @fisub_fp80_i32(x86_fp80 %a0, i32 %a1) { 169 ; X86-LABEL: fisub_fp80_i32: 170 ; X86: # %bb.0: 171 ; X86-NEXT: pushl %eax 172 ; X86-NEXT: .cfi_def_cfa_offset 8 173 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 174 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 175 ; X86-NEXT: movl %eax, (%esp) 176 ; X86-NEXT: fisubl (%esp) 177 ; X86-NEXT: popl %eax 178 ; X86-NEXT: .cfi_def_cfa_offset 4 179 ; X86-NEXT: retl 180 ; 181 ; X64-LABEL: fisub_fp80_i32: 182 ; X64: # %bb.0: 183 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 184 ; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp) 185 ; X64-NEXT: fisubl -{{[0-9]+}}(%rsp) 186 ; X64-NEXT: retq 187 %1 = sitofp i32 %a1 to x86_fp80 188 %2 = fsub x86_fp80 %a0, %1 189 ret x86_fp80 %2 190 } 191 192 define x86_fp80 @fisub_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) { 193 ; X86-LABEL: fisub_fp80_i32_ld: 194 ; X86: # %bb.0: 195 ; X86-NEXT: pushl %eax 196 ; X86-NEXT: .cfi_def_cfa_offset 8 197 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 198 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 199 ; X86-NEXT: movl (%eax), %eax 200 ; X86-NEXT: movl %eax, (%esp) 201 ; X86-NEXT: fisubl (%esp) 202 ; X86-NEXT: popl %eax 203 ; X86-NEXT: .cfi_def_cfa_offset 4 204 ; X86-NEXT: retl 205 ; 206 ; X64-LABEL: fisub_fp80_i32_ld: 207 ; X64: # %bb.0: 208 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 209 ; X64-NEXT: movl (%rdi), %eax 210 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 211 ; X64-NEXT: fisubl -{{[0-9]+}}(%rsp) 212 ; X64-NEXT: retq 213 %1 = load i32, i32 *%a1 214 %2 = sitofp i32 %1 to x86_fp80 215 %3 = fsub x86_fp80 %a0, %2 216 ret x86_fp80 %3 217 } 218 219 ; 220 ; FSUBR 221 ; 222 223 define x86_fp80 @fisubr_fp80_i16(x86_fp80 %a0, i16 %a1) { 224 ; X86-LABEL: fisubr_fp80_i16: 225 ; X86: # %bb.0: 226 ; X86-NEXT: pushl %eax 227 ; X86-NEXT: .cfi_def_cfa_offset 8 228 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 229 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 230 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 231 ; X86-NEXT: fisubrs {{[0-9]+}}(%esp) 232 ; X86-NEXT: popl %eax 233 ; X86-NEXT: .cfi_def_cfa_offset 4 234 ; X86-NEXT: retl 235 ; 236 ; X64-LABEL: fisubr_fp80_i16: 237 ; X64: # %bb.0: 238 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 239 ; X64-NEXT: movswl %di, %eax 240 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 241 ; X64-NEXT: fisubrl -{{[0-9]+}}(%rsp) 242 ; X64-NEXT: retq 243 %1 = sitofp i16 %a1 to x86_fp80 244 %2 = fsub x86_fp80 %1, %a0 245 ret x86_fp80 %2 246 } 247 248 define x86_fp80 @fisubr_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) { 249 ; X86-LABEL: fisubr_fp80_i16_ld: 250 ; X86: # %bb.0: 251 ; X86-NEXT: pushl %eax 252 ; X86-NEXT: .cfi_def_cfa_offset 8 253 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 254 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 255 ; X86-NEXT: movzwl (%eax), %eax 256 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 257 ; X86-NEXT: fisubrs {{[0-9]+}}(%esp) 258 ; X86-NEXT: popl %eax 259 ; X86-NEXT: .cfi_def_cfa_offset 4 260 ; X86-NEXT: retl 261 ; 262 ; X64-LABEL: fisubr_fp80_i16_ld: 263 ; X64: # %bb.0: 264 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 265 ; X64-NEXT: movswl (%rdi), %eax 266 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 267 ; X64-NEXT: fisubrl -{{[0-9]+}}(%rsp) 268 ; X64-NEXT: retq 269 %1 = load i16, i16 *%a1 270 %2 = sitofp i16 %1 to x86_fp80 271 %3 = fsub x86_fp80 %2, %a0 272 ret x86_fp80 %3 273 } 274 275 define x86_fp80 @fisubr_fp80_i32(x86_fp80 %a0, i32 %a1) { 276 ; X86-LABEL: fisubr_fp80_i32: 277 ; X86: # %bb.0: 278 ; X86-NEXT: pushl %eax 279 ; X86-NEXT: .cfi_def_cfa_offset 8 280 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 281 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 282 ; X86-NEXT: movl %eax, (%esp) 283 ; X86-NEXT: fisubrl (%esp) 284 ; X86-NEXT: popl %eax 285 ; X86-NEXT: .cfi_def_cfa_offset 4 286 ; X86-NEXT: retl 287 ; 288 ; X64-LABEL: fisubr_fp80_i32: 289 ; X64: # %bb.0: 290 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 291 ; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp) 292 ; X64-NEXT: fisubrl -{{[0-9]+}}(%rsp) 293 ; X64-NEXT: retq 294 %1 = sitofp i32 %a1 to x86_fp80 295 %2 = fsub x86_fp80 %1, %a0 296 ret x86_fp80 %2 297 } 298 299 define x86_fp80 @fisubr_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) { 300 ; X86-LABEL: fisubr_fp80_i32_ld: 301 ; X86: # %bb.0: 302 ; X86-NEXT: pushl %eax 303 ; X86-NEXT: .cfi_def_cfa_offset 8 304 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 305 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 306 ; X86-NEXT: movl (%eax), %eax 307 ; X86-NEXT: movl %eax, (%esp) 308 ; X86-NEXT: fisubrl (%esp) 309 ; X86-NEXT: popl %eax 310 ; X86-NEXT: .cfi_def_cfa_offset 4 311 ; X86-NEXT: retl 312 ; 313 ; X64-LABEL: fisubr_fp80_i32_ld: 314 ; X64: # %bb.0: 315 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 316 ; X64-NEXT: movl (%rdi), %eax 317 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 318 ; X64-NEXT: fisubrl -{{[0-9]+}}(%rsp) 319 ; X64-NEXT: retq 320 %1 = load i32, i32 *%a1 321 %2 = sitofp i32 %1 to x86_fp80 322 %3 = fsub x86_fp80 %2, %a0 323 ret x86_fp80 %3 324 } 325 326 ; 327 ; FMUL 328 ; 329 330 define x86_fp80 @fimul_fp80_i16(x86_fp80 %a0, i16 %a1) { 331 ; X86-LABEL: fimul_fp80_i16: 332 ; X86: # %bb.0: 333 ; X86-NEXT: pushl %eax 334 ; X86-NEXT: .cfi_def_cfa_offset 8 335 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 336 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 337 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 338 ; X86-NEXT: fimuls {{[0-9]+}}(%esp) 339 ; X86-NEXT: popl %eax 340 ; X86-NEXT: .cfi_def_cfa_offset 4 341 ; X86-NEXT: retl 342 ; 343 ; X64-LABEL: fimul_fp80_i16: 344 ; X64: # %bb.0: 345 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 346 ; X64-NEXT: movswl %di, %eax 347 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 348 ; X64-NEXT: fimull -{{[0-9]+}}(%rsp) 349 ; X64-NEXT: retq 350 %1 = sitofp i16 %a1 to x86_fp80 351 %2 = fmul x86_fp80 %a0, %1 352 ret x86_fp80 %2 353 } 354 355 define x86_fp80 @fimul_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) { 356 ; X86-LABEL: fimul_fp80_i16_ld: 357 ; X86: # %bb.0: 358 ; X86-NEXT: pushl %eax 359 ; X86-NEXT: .cfi_def_cfa_offset 8 360 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 361 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 362 ; X86-NEXT: movzwl (%eax), %eax 363 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 364 ; X86-NEXT: fimuls {{[0-9]+}}(%esp) 365 ; X86-NEXT: popl %eax 366 ; X86-NEXT: .cfi_def_cfa_offset 4 367 ; X86-NEXT: retl 368 ; 369 ; X64-LABEL: fimul_fp80_i16_ld: 370 ; X64: # %bb.0: 371 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 372 ; X64-NEXT: movswl (%rdi), %eax 373 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 374 ; X64-NEXT: fimull -{{[0-9]+}}(%rsp) 375 ; X64-NEXT: retq 376 %1 = load i16, i16 *%a1 377 %2 = sitofp i16 %1 to x86_fp80 378 %3 = fmul x86_fp80 %a0, %2 379 ret x86_fp80 %3 380 } 381 382 define x86_fp80 @fimul_fp80_i32(x86_fp80 %a0, i32 %a1) { 383 ; X86-LABEL: fimul_fp80_i32: 384 ; X86: # %bb.0: 385 ; X86-NEXT: pushl %eax 386 ; X86-NEXT: .cfi_def_cfa_offset 8 387 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 388 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 389 ; X86-NEXT: movl %eax, (%esp) 390 ; X86-NEXT: fimull (%esp) 391 ; X86-NEXT: popl %eax 392 ; X86-NEXT: .cfi_def_cfa_offset 4 393 ; X86-NEXT: retl 394 ; 395 ; X64-LABEL: fimul_fp80_i32: 396 ; X64: # %bb.0: 397 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 398 ; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp) 399 ; X64-NEXT: fimull -{{[0-9]+}}(%rsp) 400 ; X64-NEXT: retq 401 %1 = sitofp i32 %a1 to x86_fp80 402 %2 = fmul x86_fp80 %a0, %1 403 ret x86_fp80 %2 404 } 405 406 define x86_fp80 @fimul_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) { 407 ; X86-LABEL: fimul_fp80_i32_ld: 408 ; X86: # %bb.0: 409 ; X86-NEXT: pushl %eax 410 ; X86-NEXT: .cfi_def_cfa_offset 8 411 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 412 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 413 ; X86-NEXT: movl (%eax), %eax 414 ; X86-NEXT: movl %eax, (%esp) 415 ; X86-NEXT: fimull (%esp) 416 ; X86-NEXT: popl %eax 417 ; X86-NEXT: .cfi_def_cfa_offset 4 418 ; X86-NEXT: retl 419 ; 420 ; X64-LABEL: fimul_fp80_i32_ld: 421 ; X64: # %bb.0: 422 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 423 ; X64-NEXT: movl (%rdi), %eax 424 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 425 ; X64-NEXT: fimull -{{[0-9]+}}(%rsp) 426 ; X64-NEXT: retq 427 %1 = load i32, i32 *%a1 428 %2 = sitofp i32 %1 to x86_fp80 429 %3 = fmul x86_fp80 %a0, %2 430 ret x86_fp80 %3 431 } 432 433 ; 434 ; FDIV 435 ; 436 437 define x86_fp80 @fidiv_fp80_i16(x86_fp80 %a0, i16 %a1) { 438 ; X86-LABEL: fidiv_fp80_i16: 439 ; X86: # %bb.0: 440 ; X86-NEXT: pushl %eax 441 ; X86-NEXT: .cfi_def_cfa_offset 8 442 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 443 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 444 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 445 ; X86-NEXT: fidivs {{[0-9]+}}(%esp) 446 ; X86-NEXT: popl %eax 447 ; X86-NEXT: .cfi_def_cfa_offset 4 448 ; X86-NEXT: retl 449 ; 450 ; X64-LABEL: fidiv_fp80_i16: 451 ; X64: # %bb.0: 452 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 453 ; X64-NEXT: movswl %di, %eax 454 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 455 ; X64-NEXT: fidivl -{{[0-9]+}}(%rsp) 456 ; X64-NEXT: retq 457 %1 = sitofp i16 %a1 to x86_fp80 458 %2 = fdiv x86_fp80 %a0, %1 459 ret x86_fp80 %2 460 } 461 462 define x86_fp80 @fidiv_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) { 463 ; X86-LABEL: fidiv_fp80_i16_ld: 464 ; X86: # %bb.0: 465 ; X86-NEXT: pushl %eax 466 ; X86-NEXT: .cfi_def_cfa_offset 8 467 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 468 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 469 ; X86-NEXT: movzwl (%eax), %eax 470 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 471 ; X86-NEXT: fidivs {{[0-9]+}}(%esp) 472 ; X86-NEXT: popl %eax 473 ; X86-NEXT: .cfi_def_cfa_offset 4 474 ; X86-NEXT: retl 475 ; 476 ; X64-LABEL: fidiv_fp80_i16_ld: 477 ; X64: # %bb.0: 478 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 479 ; X64-NEXT: movswl (%rdi), %eax 480 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 481 ; X64-NEXT: fidivl -{{[0-9]+}}(%rsp) 482 ; X64-NEXT: retq 483 %1 = load i16, i16 *%a1 484 %2 = sitofp i16 %1 to x86_fp80 485 %3 = fdiv x86_fp80 %a0, %2 486 ret x86_fp80 %3 487 } 488 489 define x86_fp80 @fidiv_fp80_i32(x86_fp80 %a0, i32 %a1) { 490 ; X86-LABEL: fidiv_fp80_i32: 491 ; X86: # %bb.0: 492 ; X86-NEXT: pushl %eax 493 ; X86-NEXT: .cfi_def_cfa_offset 8 494 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 495 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 496 ; X86-NEXT: movl %eax, (%esp) 497 ; X86-NEXT: fidivl (%esp) 498 ; X86-NEXT: popl %eax 499 ; X86-NEXT: .cfi_def_cfa_offset 4 500 ; X86-NEXT: retl 501 ; 502 ; X64-LABEL: fidiv_fp80_i32: 503 ; X64: # %bb.0: 504 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 505 ; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp) 506 ; X64-NEXT: fidivl -{{[0-9]+}}(%rsp) 507 ; X64-NEXT: retq 508 %1 = sitofp i32 %a1 to x86_fp80 509 %2 = fdiv x86_fp80 %a0, %1 510 ret x86_fp80 %2 511 } 512 513 define x86_fp80 @fidiv_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) { 514 ; X86-LABEL: fidiv_fp80_i32_ld: 515 ; X86: # %bb.0: 516 ; X86-NEXT: pushl %eax 517 ; X86-NEXT: .cfi_def_cfa_offset 8 518 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 519 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 520 ; X86-NEXT: movl (%eax), %eax 521 ; X86-NEXT: movl %eax, (%esp) 522 ; X86-NEXT: fidivl (%esp) 523 ; X86-NEXT: popl %eax 524 ; X86-NEXT: .cfi_def_cfa_offset 4 525 ; X86-NEXT: retl 526 ; 527 ; X64-LABEL: fidiv_fp80_i32_ld: 528 ; X64: # %bb.0: 529 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 530 ; X64-NEXT: movl (%rdi), %eax 531 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 532 ; X64-NEXT: fidivl -{{[0-9]+}}(%rsp) 533 ; X64-NEXT: retq 534 %1 = load i32, i32 *%a1 535 %2 = sitofp i32 %1 to x86_fp80 536 %3 = fdiv x86_fp80 %a0, %2 537 ret x86_fp80 %3 538 } 539 540 ; 541 ; FDIVR 542 ; 543 544 define x86_fp80 @fidivr_fp80_i16(x86_fp80 %a0, i16 %a1) { 545 ; X86-LABEL: fidivr_fp80_i16: 546 ; X86: # %bb.0: 547 ; X86-NEXT: pushl %eax 548 ; X86-NEXT: .cfi_def_cfa_offset 8 549 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 550 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 551 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 552 ; X86-NEXT: fidivrs {{[0-9]+}}(%esp) 553 ; X86-NEXT: popl %eax 554 ; X86-NEXT: .cfi_def_cfa_offset 4 555 ; X86-NEXT: retl 556 ; 557 ; X64-LABEL: fidivr_fp80_i16: 558 ; X64: # %bb.0: 559 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 560 ; X64-NEXT: movswl %di, %eax 561 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 562 ; X64-NEXT: fidivrl -{{[0-9]+}}(%rsp) 563 ; X64-NEXT: retq 564 %1 = sitofp i16 %a1 to x86_fp80 565 %2 = fdiv x86_fp80 %1, %a0 566 ret x86_fp80 %2 567 } 568 569 define x86_fp80 @fidivr_fp80_i16_ld(x86_fp80 %a0, i16 *%a1) { 570 ; X86-LABEL: fidivr_fp80_i16_ld: 571 ; X86: # %bb.0: 572 ; X86-NEXT: pushl %eax 573 ; X86-NEXT: .cfi_def_cfa_offset 8 574 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 575 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 576 ; X86-NEXT: movzwl (%eax), %eax 577 ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 578 ; X86-NEXT: fidivrs {{[0-9]+}}(%esp) 579 ; X86-NEXT: popl %eax 580 ; X86-NEXT: .cfi_def_cfa_offset 4 581 ; X86-NEXT: retl 582 ; 583 ; X64-LABEL: fidivr_fp80_i16_ld: 584 ; X64: # %bb.0: 585 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 586 ; X64-NEXT: movswl (%rdi), %eax 587 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 588 ; X64-NEXT: fidivrl -{{[0-9]+}}(%rsp) 589 ; X64-NEXT: retq 590 %1 = load i16, i16 *%a1 591 %2 = sitofp i16 %1 to x86_fp80 592 %3 = fdiv x86_fp80 %2, %a0 593 ret x86_fp80 %3 594 } 595 596 define x86_fp80 @fidivr_fp80_i32(x86_fp80 %a0, i32 %a1) { 597 ; X86-LABEL: fidivr_fp80_i32: 598 ; X86: # %bb.0: 599 ; X86-NEXT: pushl %eax 600 ; X86-NEXT: .cfi_def_cfa_offset 8 601 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 602 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 603 ; X86-NEXT: movl %eax, (%esp) 604 ; X86-NEXT: fidivrl (%esp) 605 ; X86-NEXT: popl %eax 606 ; X86-NEXT: .cfi_def_cfa_offset 4 607 ; X86-NEXT: retl 608 ; 609 ; X64-LABEL: fidivr_fp80_i32: 610 ; X64: # %bb.0: 611 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 612 ; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp) 613 ; X64-NEXT: fidivrl -{{[0-9]+}}(%rsp) 614 ; X64-NEXT: retq 615 %1 = sitofp i32 %a1 to x86_fp80 616 %2 = fdiv x86_fp80 %1, %a0 617 ret x86_fp80 %2 618 } 619 620 define x86_fp80 @fidivr_fp80_i32_ld(x86_fp80 %a0, i32 *%a1) { 621 ; X86-LABEL: fidivr_fp80_i32_ld: 622 ; X86: # %bb.0: 623 ; X86-NEXT: pushl %eax 624 ; X86-NEXT: .cfi_def_cfa_offset 8 625 ; X86-NEXT: fldt {{[0-9]+}}(%esp) 626 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 627 ; X86-NEXT: movl (%eax), %eax 628 ; X86-NEXT: movl %eax, (%esp) 629 ; X86-NEXT: fidivrl (%esp) 630 ; X86-NEXT: popl %eax 631 ; X86-NEXT: .cfi_def_cfa_offset 4 632 ; X86-NEXT: retl 633 ; 634 ; X64-LABEL: fidivr_fp80_i32_ld: 635 ; X64: # %bb.0: 636 ; X64-NEXT: fldt {{[0-9]+}}(%rsp) 637 ; X64-NEXT: movl (%rdi), %eax 638 ; X64-NEXT: movl %eax, -{{[0-9]+}}(%rsp) 639 ; X64-NEXT: fidivrl -{{[0-9]+}}(%rsp) 640 ; X64-NEXT: retq 641 %1 = load i32, i32 *%a1 642 %2 = sitofp i32 %1 to x86_fp80 643 %3 = fdiv x86_fp80 %2, %a0 644 ret x86_fp80 %3 645 } 646
