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      1 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
      2 ; RUN:     -enable-legalize-types-checking | FileCheck %s
      3 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \
      4 ; RUN:     -enable-legalize-types-checking | FileCheck %s
      5 
      6 define i32 @TestComp128GT(fp128 %d1, fp128 %d2) {
      7 entry:
      8   %cmp = fcmp ogt fp128 %d1, %d2
      9   %conv = zext i1 %cmp to i32
     10   ret i32 %conv
     11 ; CHECK-LABEL: TestComp128GT:
     12 ; CHECK:       callq __gttf2
     13 ; CHECK:       xorl  %ecx, %ecx
     14 ; CHECK:       setg  %cl
     15 ; CHECK:       movl  %ecx, %eax
     16 ; CHECK:       retq
     17 }
     18 
     19 define i32 @TestComp128GE(fp128 %d1, fp128 %d2) {
     20 entry:
     21   %cmp = fcmp oge fp128 %d1, %d2
     22   %conv = zext i1 %cmp to i32
     23   ret i32 %conv
     24 ; CHECK-LABEL: TestComp128GE:
     25 ; CHECK:       callq __getf2
     26 ; CHECK:       xorl  %ecx, %ecx
     27 ; CHECK:       testl %eax, %eax
     28 ; CHECK:       setns %cl
     29 ; CHECK:       movl  %ecx, %eax
     30 ; CHECK:       retq
     31 }
     32 
     33 define i32 @TestComp128LT(fp128 %d1, fp128 %d2) {
     34 entry:
     35   %cmp = fcmp olt fp128 %d1, %d2
     36   %conv = zext i1 %cmp to i32
     37   ret i32 %conv
     38 ; CHECK-LABEL: TestComp128LT:
     39 ; CHECK:       callq __lttf2
     40 ; CHECK-NEXT:  shrl $31, %eax
     41 ; CHECK:       retq
     42 ;
     43 ; The 'shrl' is a special optimization in llvm to combine
     44 ; the effect of 'fcmp olt' and 'zext'. The main purpose is
     45 ; to test soften call to __lttf2.
     46 }
     47 
     48 define i32 @TestComp128LE(fp128 %d1, fp128 %d2) {
     49 entry:
     50   %cmp = fcmp ole fp128 %d1, %d2
     51   %conv = zext i1 %cmp to i32
     52   ret i32 %conv
     53 ; CHECK-LABEL: TestComp128LE:
     54 ; CHECK:       callq __letf2
     55 ; CHECK:       xorl  %ecx, %ecx
     56 ; CHECK:       testl %eax, %eax
     57 ; CHECK:       setle %cl
     58 ; CHECK:       movl  %ecx, %eax
     59 ; CHECK:       retq
     60 }
     61 
     62 define i32 @TestComp128EQ(fp128 %d1, fp128 %d2) {
     63 entry:
     64   %cmp = fcmp oeq fp128 %d1, %d2
     65   %conv = zext i1 %cmp to i32
     66   ret i32 %conv
     67 ; CHECK-LABEL: TestComp128EQ:
     68 ; CHECK:       callq __eqtf2
     69 ; CHECK:       xorl  %ecx, %ecx
     70 ; CHECK:       testl %eax, %eax
     71 ; CHECK:       sete  %cl
     72 ; CHECK:       movl  %ecx, %eax
     73 ; CHECK:       retq
     74 }
     75 
     76 define i32 @TestComp128NE(fp128 %d1, fp128 %d2) {
     77 entry:
     78   %cmp = fcmp une fp128 %d1, %d2
     79   %conv = zext i1 %cmp to i32
     80   ret i32 %conv
     81 ; CHECK-LABEL: TestComp128NE:
     82 ; CHECK:       callq __netf2
     83 ; CHECK:       xorl  %ecx, %ecx
     84 ; CHECK:       testl %eax, %eax
     85 ; CHECK:       setne %cl
     86 ; CHECK:       movl  %ecx, %eax
     87 ; CHECK:       retq
     88 }
     89 
     90 define fp128 @TestMax(fp128 %x, fp128 %y) {
     91 entry:
     92   %cmp = fcmp ogt fp128 %x, %y
     93   %cond = select i1 %cmp, fp128 %x, fp128 %y
     94   ret fp128 %cond
     95 ; CHECK-LABEL: TestMax:
     96 ; CHECK: movaps %xmm0
     97 ; CHECK: movaps %xmm1
     98 ; CHECK: callq __gttf2
     99 ; CHECK: movaps {{.*}}, %xmm0
    100 ; CHECK: testl %eax, %eax
    101 ; CHECK: movaps {{.*}}, %xmm0
    102 ; CHECK: retq
    103 }
    104