1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s 3 4 ; Check constant FP to signed integer conversions that overflow the integer type. 5 6 define i32 @constant_v2f64_to_i32() { 7 ; CHECK-LABEL: constant_v2f64_to_i32: 8 ; CHECK: # %bb.0: 9 ; CHECK-NEXT: cvtsd2si {{.*}}(%rip), %eax 10 ; CHECK-NEXT: retq 11 %r = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 5.0e+09, double undef>) 12 ret i32 %r 13 } 14 15 define i32 @constant_v2f64_to_i32_round_to_zero() { 16 ; CHECK-LABEL: constant_v2f64_to_i32_round_to_zero: 17 ; CHECK: # %bb.0: 18 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax 19 ; CHECK-NEXT: retq 20 %r = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> <double 5.0e+09, double undef>) 21 ret i32 %r 22 } 23 24 define i64 @constant_v2f64_to_i64() { 25 ; CHECK-LABEL: constant_v2f64_to_i64: 26 ; CHECK: # %bb.0: 27 ; CHECK-NEXT: cvtsd2si {{.*}}(%rip), %rax 28 ; CHECK-NEXT: retq 29 %r = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 5.0e+19, double undef>) 30 ret i64 %r 31 } 32 33 define i64 @constant_v2f64_to_i64_round_to_zero() { 34 ; CHECK-LABEL: constant_v2f64_to_i64_round_to_zero: 35 ; CHECK: # %bb.0: 36 ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax 37 ; CHECK-NEXT: retq 38 %r = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> <double 5.0e+19, double undef>) 39 ret i64 %r 40 } 41 42 define <4 x i32> @constant_v2f64_to_v4i32() { 43 ; CHECK-LABEL: constant_v2f64_to_v4i32: 44 ; CHECK: # %bb.0: 45 ; CHECK-NEXT: cvtpd2dq {{.*}}(%rip), %xmm0 46 ; CHECK-NEXT: retq 47 %r = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> <double 5.0e+09, double 5.0e+09>) 48 ret <4 x i32> %r 49 } 50 51 define <4 x i32> @constant_v2f64_to_v4i32_round_to_zero() { 52 ; CHECK-LABEL: constant_v2f64_to_v4i32_round_to_zero: 53 ; CHECK: # %bb.0: 54 ; CHECK-NEXT: cvttpd2dq {{.*}}(%rip), %xmm0 55 ; CHECK-NEXT: retq 56 %r = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> <double 5.0e+09, double 5.0e+09>) 57 ret <4 x i32> %r 58 } 59 60 define i32 @constant_v4f32_to_i32() { 61 ; CHECK-LABEL: constant_v4f32_to_i32: 62 ; CHECK: # %bb.0: 63 ; CHECK-NEXT: cvtss2si {{.*}}(%rip), %eax 64 ; CHECK-NEXT: retq 65 %r = call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 5.0e+09, float undef, float undef, float undef>) 66 ret i32 %r 67 } 68 69 define i32 @constant_v4f32_to_i32_round_to_zero() { 70 ; CHECK-LABEL: constant_v4f32_to_i32_round_to_zero: 71 ; CHECK: # %bb.0: 72 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax 73 ; CHECK-NEXT: retq 74 %r = call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 5.0e+09, float undef, float undef, float undef>) 75 ret i32 %r 76 } 77 78 ; 9223372036854775808.0 = 0x8000000000000000 79 80 define i64 @constant_v4f32_to_i64() { 81 ; CHECK-LABEL: constant_v4f32_to_i64: 82 ; CHECK: # %bb.0: 83 ; CHECK-NEXT: cvtss2si {{.*}}(%rip), %rax 84 ; CHECK-NEXT: retq 85 %r = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> <float 9223372036854775808.0, float undef, float undef, float undef>) 86 ret i64 %r 87 } 88 89 define i64 @constant_v4f32_to_i64_round_to_zero() { 90 ; CHECK-LABEL: constant_v4f32_to_i64_round_to_zero: 91 ; CHECK: # %bb.0: 92 ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax 93 ; CHECK-NEXT: retq 94 %r = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> <float 9223372036854775808.0, float undef, float undef, float undef>) 95 ret i64 %r 96 } 97 98 define <4 x i32> @constant_v4f32_to_v4i32() { 99 ; CHECK-LABEL: constant_v4f32_to_v4i32: 100 ; CHECK: # %bb.0: 101 ; CHECK-NEXT: cvtps2dq {{.*}}(%rip), %xmm0 102 ; CHECK-NEXT: retq 103 %r = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> <float 5.0e+09, float 5.0e+09, float 5.0e+09, float 5.0e+09>) 104 ret <4 x i32> %r 105 } 106 107 define <4 x i32> @constant_v4f32_to_v4i32_round_to_zero() { 108 ; CHECK-LABEL: constant_v4f32_to_v4i32_round_to_zero: 109 ; CHECK: # %bb.0: 110 ; CHECK-NEXT: cvttps2dq {{.*}}(%rip), %xmm0 111 ; CHECK-NEXT: retq 112 %r = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> <float 5.0e+09, float 5.0e+09, float 5.0e+09, float 5.0e+09>) 113 ret <4 x i32> %r 114 } 115 116 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) 117 declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) 118 119 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) 120 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) 121 122 declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>) 123 declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>) 124 125 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) 126 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) 127 128 declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) 129 declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) 130 131 declare <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float>) 132 declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) 133 134
