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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
      3 
      4 define i64 @test1(i32 %xx, i32 %test) nounwind {
      5 ; CHECK-LABEL: test1:
      6 ; CHECK:       # %bb.0:
      7 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
      8 ; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
      9 ; CHECK-NEXT:    andb $7, %cl
     10 ; CHECK-NEXT:    movl %edx, %eax
     11 ; CHECK-NEXT:    shll %cl, %eax
     12 ; CHECK-NEXT:    shrl %edx
     13 ; CHECK-NEXT:    xorb $31, %cl
     14 ; CHECK-NEXT:    shrl %cl, %edx
     15 ; CHECK-NEXT:    retl
     16   %conv = zext i32 %xx to i64
     17   %and = and i32 %test, 7
     18   %sh_prom = zext i32 %and to i64
     19   %shl = shl i64 %conv, %sh_prom
     20   ret i64 %shl
     21 }
     22 
     23 define i64 @test2(i64 %xx, i32 %test) nounwind {
     24 ; CHECK-LABEL: test2:
     25 ; CHECK:       # %bb.0:
     26 ; CHECK-NEXT:    pushl %esi
     27 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
     28 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
     29 ; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
     30 ; CHECK-NEXT:    andb $7, %cl
     31 ; CHECK-NEXT:    movl %esi, %eax
     32 ; CHECK-NEXT:    shll %cl, %eax
     33 ; CHECK-NEXT:    shldl %cl, %esi, %edx
     34 ; CHECK-NEXT:    popl %esi
     35 ; CHECK-NEXT:    retl
     36   %and = and i32 %test, 7
     37   %sh_prom = zext i32 %and to i64
     38   %shl = shl i64 %xx, %sh_prom
     39   ret i64 %shl
     40 }
     41 
     42 define i64 @test3(i64 %xx, i32 %test) nounwind {
     43 ; CHECK-LABEL: test3:
     44 ; CHECK:       # %bb.0:
     45 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
     46 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
     47 ; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
     48 ; CHECK-NEXT:    andb $7, %cl
     49 ; CHECK-NEXT:    shrdl %cl, %edx, %eax
     50 ; CHECK-NEXT:    shrl %cl, %edx
     51 ; CHECK-NEXT:    retl
     52   %and = and i32 %test, 7
     53   %sh_prom = zext i32 %and to i64
     54   %shr = lshr i64 %xx, %sh_prom
     55   ret i64 %shr
     56 }
     57 
     58 define i64 @test4(i64 %xx, i32 %test) nounwind {
     59 ; CHECK-LABEL: test4:
     60 ; CHECK:       # %bb.0:
     61 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
     62 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
     63 ; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
     64 ; CHECK-NEXT:    andb $7, %cl
     65 ; CHECK-NEXT:    shrdl %cl, %edx, %eax
     66 ; CHECK-NEXT:    sarl %cl, %edx
     67 ; CHECK-NEXT:    retl
     68   %and = and i32 %test, 7
     69   %sh_prom = zext i32 %and to i64
     70   %shr = ashr i64 %xx, %sh_prom
     71   ret i64 %shr
     72 }
     73 
     74 ; PR14668
     75 define <2 x i64> @test5(<2 x i64> %A, <2 x i64> %B) {
     76 ; CHECK-LABEL: test5:
     77 ; CHECK:       # %bb.0:
     78 ; CHECK-NEXT:    pushl %ebp
     79 ; CHECK-NEXT:    .cfi_def_cfa_offset 8
     80 ; CHECK-NEXT:    pushl %ebx
     81 ; CHECK-NEXT:    .cfi_def_cfa_offset 12
     82 ; CHECK-NEXT:    pushl %edi
     83 ; CHECK-NEXT:    .cfi_def_cfa_offset 16
     84 ; CHECK-NEXT:    pushl %esi
     85 ; CHECK-NEXT:    .cfi_def_cfa_offset 20
     86 ; CHECK-NEXT:    .cfi_offset %esi, -20
     87 ; CHECK-NEXT:    .cfi_offset %edi, -16
     88 ; CHECK-NEXT:    .cfi_offset %ebx, -12
     89 ; CHECK-NEXT:    .cfi_offset %ebp, -8
     90 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
     91 ; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
     92 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ebx
     93 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %esi
     94 ; CHECK-NEXT:    movl %ebx, %edi
     95 ; CHECK-NEXT:    shll %cl, %edi
     96 ; CHECK-NEXT:    shldl %cl, %ebx, %esi
     97 ; CHECK-NEXT:    testb $32, %cl
     98 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ebp
     99 ; CHECK-NEXT:    je .LBB4_2
    100 ; CHECK-NEXT:  # %bb.1:
    101 ; CHECK-NEXT:    movl %edi, %esi
    102 ; CHECK-NEXT:    xorl %edi, %edi
    103 ; CHECK-NEXT:  .LBB4_2:
    104 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
    105 ; CHECK-NEXT:    movl %edx, %ebx
    106 ; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
    107 ; CHECK-NEXT:    shll %cl, %ebx
    108 ; CHECK-NEXT:    shldl %cl, %edx, %ebp
    109 ; CHECK-NEXT:    testb $32, %cl
    110 ; CHECK-NEXT:    je .LBB4_4
    111 ; CHECK-NEXT:  # %bb.3:
    112 ; CHECK-NEXT:    movl %ebx, %ebp
    113 ; CHECK-NEXT:    xorl %ebx, %ebx
    114 ; CHECK-NEXT:  .LBB4_4:
    115 ; CHECK-NEXT:    movl %ebp, 12(%eax)
    116 ; CHECK-NEXT:    movl %ebx, 8(%eax)
    117 ; CHECK-NEXT:    movl %esi, 4(%eax)
    118 ; CHECK-NEXT:    movl %edi, (%eax)
    119 ; CHECK-NEXT:    popl %esi
    120 ; CHECK-NEXT:    .cfi_def_cfa_offset 16
    121 ; CHECK-NEXT:    popl %edi
    122 ; CHECK-NEXT:    .cfi_def_cfa_offset 12
    123 ; CHECK-NEXT:    popl %ebx
    124 ; CHECK-NEXT:    .cfi_def_cfa_offset 8
    125 ; CHECK-NEXT:    popl %ebp
    126 ; CHECK-NEXT:    .cfi_def_cfa_offset 4
    127 ; CHECK-NEXT:    retl $4
    128   %shl = shl <2 x i64> %A, %B
    129   ret <2 x i64> %shl
    130 }
    131 
    132 ; PR16108
    133 define i32 @test6() {
    134 ; CHECK-LABEL: test6:
    135 ; CHECK:       # %bb.0:
    136 ; CHECK-NEXT:    pushl %ebp
    137 ; CHECK-NEXT:    .cfi_def_cfa_offset 8
    138 ; CHECK-NEXT:    .cfi_offset %ebp, -8
    139 ; CHECK-NEXT:    movl %esp, %ebp
    140 ; CHECK-NEXT:    .cfi_def_cfa_register %ebp
    141 ; CHECK-NEXT:    andl $-8, %esp
    142 ; CHECK-NEXT:    subl $16, %esp
    143 ; CHECK-NEXT:    movl $1, {{[0-9]+}}(%esp)
    144 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
    145 ; CHECK-NEXT:    xorl %eax, %eax
    146 ; CHECK-NEXT:    orl $0, %eax
    147 ; CHECK-NEXT:    je .LBB5_3
    148 ; CHECK-NEXT:  # %bb.1: # %if.then
    149 ; CHECK-NEXT:    movl $1, %eax
    150 ; CHECK-NEXT:    jmp .LBB5_2
    151 ; CHECK-NEXT:  .LBB5_3: # %if.end
    152 ; CHECK-NEXT:    xorl %eax, %eax
    153 ; CHECK-NEXT:  .LBB5_2: # %if.then
    154 ; CHECK-NEXT:    movl %ebp, %esp
    155 ; CHECK-NEXT:    popl %ebp
    156 ; CHECK-NEXT:    .cfi_def_cfa %esp, 4
    157 ; CHECK-NEXT:    retl
    158   %x = alloca i32, align 4
    159   %t = alloca i64, align 8
    160   store volatile i32 1, i32* %x, align 4
    161   %load = load volatile i32, i32* %x, align 4
    162   %shl = shl i32 %load, 8
    163   %add = add i32 %shl, -224
    164   %sh_prom = zext i32 %add to i64
    165   %shl1 = shl i64 1, %sh_prom
    166   %cmp = icmp ne i64 %shl1, 4294967296
    167   br i1 %cmp, label %if.then, label %if.end
    168 
    169 if.then:                                          ; preds = %entry
    170   ret i32 1
    171 
    172 if.end:                                           ; preds = %entry
    173   ret i32 0
    174 
    175 }
    176