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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+lwp | FileCheck %s --check-prefix=X86
      3 ; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X86
      4 ; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X86
      5 ; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X86
      6 ; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X86
      7 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
      8 ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X64
      9 ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X64
     10 ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X64
     11 ; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X64
     12 
     13 define void @test_llwpcb(i8 *%a0) nounwind {
     14 ; X86-LABEL: test_llwpcb:
     15 ; X86:       # %bb.0:
     16 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
     17 ; X86-NEXT:    llwpcb %eax
     18 ; X86-NEXT:    retl
     19 ;
     20 ; X64-LABEL: test_llwpcb:
     21 ; X64:       # %bb.0:
     22 ; X64-NEXT:    llwpcb %rdi
     23 ; X64-NEXT:    retq
     24   tail call void @llvm.x86.llwpcb(i8 *%a0)
     25   ret void
     26 }
     27 
     28 define i8* @test_slwpcb(i8 *%a0) nounwind {
     29 ; X86-LABEL: test_slwpcb:
     30 ; X86:       # %bb.0:
     31 ; X86-NEXT:    slwpcb %eax
     32 ; X86-NEXT:    retl
     33 ;
     34 ; X64-LABEL: test_slwpcb:
     35 ; X64:       # %bb.0:
     36 ; X64-NEXT:    slwpcb %rax
     37 ; X64-NEXT:    retq
     38   %1 = tail call i8* @llvm.x86.slwpcb()
     39   ret i8 *%1
     40 }
     41 
     42 define i8 @test_lwpins32_rri(i32 %a0, i32 %a1) nounwind {
     43 ; X86-LABEL: test_lwpins32_rri:
     44 ; X86:       # %bb.0:
     45 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
     46 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
     47 ; X86-NEXT:    addl %ecx, %ecx
     48 ; X86-NEXT:    lwpins $-1985229329, %ecx, %eax # imm = 0x89ABCDEF
     49 ; X86-NEXT:    setb %al
     50 ; X86-NEXT:    retl
     51 ;
     52 ; X64-LABEL: test_lwpins32_rri:
     53 ; X64:       # %bb.0:
     54 ; X64-NEXT:    addl %esi, %esi
     55 ; X64-NEXT:    lwpins $-1985229329, %esi, %edi # imm = 0x89ABCDEF
     56 ; X64-NEXT:    setb %al
     57 ; X64-NEXT:    retq
     58   %1 = add i32 %a1, %a1
     59   %2 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %1, i32 2309737967)
     60   ret i8 %2
     61 }
     62 
     63 define i8 @test_lwpins32_rmi(i32 %a0, i32 *%p1) nounwind {
     64 ; X86-LABEL: test_lwpins32_rmi:
     65 ; X86:       # %bb.0:
     66 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
     67 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
     68 ; X86-NEXT:    lwpins $1985229328, (%eax), %ecx # imm = 0x76543210
     69 ; X86-NEXT:    setb %al
     70 ; X86-NEXT:    retl
     71 ;
     72 ; X64-LABEL: test_lwpins32_rmi:
     73 ; X64:       # %bb.0:
     74 ; X64-NEXT:    lwpins $1985229328, (%rsi), %edi # imm = 0x76543210
     75 ; X64-NEXT:    setb %al
     76 ; X64-NEXT:    retq
     77   %a1 = load i32, i32 *%p1
     78   %1 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %a1, i32 1985229328)
     79   ret i8 %1
     80 }
     81 
     82 define void @test_lwpval32_rri(i32 %a0, i32 %a1) nounwind {
     83 ; X86-LABEL: test_lwpval32_rri:
     84 ; X86:       # %bb.0:
     85 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
     86 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
     87 ; X86-NEXT:    addl %ecx, %ecx
     88 ; X86-NEXT:    lwpval $-19088744, %ecx, %eax # imm = 0xFEDCBA98
     89 ; X86-NEXT:    retl
     90 ;
     91 ; X64-LABEL: test_lwpval32_rri:
     92 ; X64:       # %bb.0:
     93 ; X64-NEXT:    addl %esi, %esi
     94 ; X64-NEXT:    lwpval $-19088744, %esi, %edi # imm = 0xFEDCBA98
     95 ; X64-NEXT:    retq
     96   %1 = add i32 %a1, %a1
     97   tail call void @llvm.x86.lwpval32(i32 %a0, i32 %1, i32 4275878552)
     98   ret void
     99 }
    100 
    101 define void @test_lwpval32_rmi(i32 %a0, i32 *%p1) nounwind {
    102 ; X86-LABEL: test_lwpval32_rmi:
    103 ; X86:       # %bb.0:
    104 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
    105 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
    106 ; X86-NEXT:    lwpval $305419896, (%eax), %ecx # imm = 0x12345678
    107 ; X86-NEXT:    retl
    108 ;
    109 ; X64-LABEL: test_lwpval32_rmi:
    110 ; X64:       # %bb.0:
    111 ; X64-NEXT:    lwpval $305419896, (%rsi), %edi # imm = 0x12345678
    112 ; X64-NEXT:    retq
    113   %a1 = load i32, i32 *%p1
    114   tail call void @llvm.x86.lwpval32(i32 %a0, i32 %a1, i32 305419896)
    115   ret void
    116 }
    117 
    118 declare void @llvm.x86.llwpcb(i8*) nounwind
    119 declare i8* @llvm.x86.slwpcb() nounwind
    120 declare i8 @llvm.x86.lwpins32(i32, i32, i32) nounwind
    121 declare void @llvm.x86.lwpval32(i32, i32, i32) nounwind
    122