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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
      3 ; rdar://7610418
      4 
      5 %ptr = type { i8* }
      6 %struct.s1 = type { %ptr, %ptr }
      7 %struct.s2 = type { i32, i8*, i8*, [256 x %struct.s1*], [8 x i32], i64, i8*, i32, i64, i64, i32, %struct.s3*, %struct.s3*, [49 x i64] }
      8 %struct.s3 = type { %struct.s3*, %struct.s3*, i32, i32, i32 }
      9 
     10 define fastcc i8* @t(i32 %base) nounwind {
     11 ; CHECK-LABEL: t:
     12 ; CHECK:       # %bb.0: # %entry
     13 ; CHECK-NEXT:    pushq %rax
     14 ; CHECK-NEXT:    movl %edi, %eax
     15 ; CHECK-NEXT:    shlq $9, %rax
     16 ; CHECK-NEXT:    leaq (%rax,%rax,4), %rdi
     17 ; CHECK-NEXT:    xorl %eax, %eax
     18 ; CHECK-NEXT:    testb %al, %al
     19 ; CHECK-NEXT:    jne .LBB0_2
     20 ; CHECK-NEXT:  # %bb.1: # %bb1
     21 ; CHECK-NEXT:    callq bar
     22 ; CHECK-NEXT:  .LBB0_2: # %bb2
     23 ; CHECK-NEXT:    callq foo
     24 entry:
     25   %0 = zext i32 %base to i64
     26   %1 = getelementptr inbounds %struct.s2, %struct.s2* null, i64 %0
     27   br i1 undef, label %bb1, label %bb2
     28 
     29 bb1:
     30   %2 = getelementptr inbounds %struct.s2, %struct.s2* null, i64 %0, i32 0
     31   call void @bar(i32* %2) nounwind
     32   unreachable
     33 
     34 bb2:
     35   %3 = call fastcc i8* @foo(%struct.s2* %1) nounwind
     36   unreachable
     37 
     38 bb3:
     39   ret i8* undef
     40 }
     41 
     42 declare void @bar(i32*)
     43 
     44 declare fastcc i8* @foo(%struct.s2*) nounwind
     45 
     46 ; rdar://8773371
     47 
     48 declare void @printf(...) nounwind
     49 
     50 define void @commute(i32 %test_case, i32 %scale) nounwind ssp {
     51 ; CHECK-LABEL: commute:
     52 ; CHECK:       # %bb.0: # %entry
     53 ; CHECK-NEXT:    # kill: def $esi killed $esi def $rsi
     54 ; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
     55 ; CHECK-NEXT:    leal -1(%rdi), %eax
     56 ; CHECK-NEXT:    cmpl $2, %eax
     57 ; CHECK-NEXT:    ja .LBB1_4
     58 ; CHECK-NEXT:  # %bb.1: # %sw.bb
     59 ; CHECK-NEXT:    xorl %eax, %eax
     60 ; CHECK-NEXT:    testb %al, %al
     61 ; CHECK-NEXT:    jne .LBB1_4
     62 ; CHECK-NEXT:  # %bb.2: # %if.end34
     63 ; CHECK-NEXT:    pushq %rax
     64 ; CHECK-NEXT:    imull %edi, %esi
     65 ; CHECK-NEXT:    leal (%rsi,%rsi,2), %esi
     66 ; CHECK-NEXT:    xorl %eax, %eax
     67 ; CHECK-NEXT:    # kill: def $edi killed $edi killed $rdi
     68 ; CHECK-NEXT:    callq printf
     69 ; CHECK-NEXT:    addq $8, %rsp
     70 ; CHECK-NEXT:    .p2align 4, 0x90
     71 ; CHECK-NEXT:  .LBB1_3: # %for.body53.us
     72 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
     73 ; CHECK-NEXT:    jmp .LBB1_3
     74 ; CHECK-NEXT:  .LBB1_4: # %sw.bb307
     75 ; CHECK-NEXT:    retq
     76 entry:
     77   switch i32 %test_case, label %sw.bb307 [
     78     i32 1, label %sw.bb
     79     i32 2, label %sw.bb
     80     i32 3, label %sw.bb
     81   ]
     82 
     83 sw.bb:
     84   %mul = mul nsw i32 %test_case, 3
     85   %mul20 = mul nsw i32 %mul, %scale
     86   br i1 undef, label %if.end34, label %sw.bb307
     87 
     88 if.end34:
     89   tail call void (...) @printf(i32 %test_case, i32 %mul20) nounwind
     90   %tmp = mul i32 %scale, %test_case
     91   %tmp752 = mul i32 %tmp, 3
     92   %tmp753 = zext i32 %tmp752 to i64
     93   br label %bb.nph743.us
     94 
     95 for.body53.us:
     96   %exitcond = icmp eq i64 undef, %tmp753
     97   br i1 %exitcond, label %bb.nph743.us, label %for.body53.us
     98 
     99 bb.nph743.us:
    100   br label %for.body53.us
    101 
    102 sw.bb307:
    103   ret void
    104 }
    105 
    106 ; CSE physical register defining instruction across MBB boundary.
    107 ; rdar://10660865
    108 define i32 @cross_mbb_phys_cse(i32 %a, i32 %b) nounwind ssp {
    109 ; CHECK-LABEL: cross_mbb_phys_cse:
    110 ; CHECK:       # %bb.0: # %entry
    111 ; CHECK-NEXT:    movl $1, %eax
    112 ; CHECK-NEXT:    cmpl %esi, %edi
    113 ; CHECK-NEXT:    ja .LBB2_2
    114 ; CHECK-NEXT:  # %bb.1: # %if.end
    115 ; CHECK-NEXT:    sbbl %eax, %eax
    116 ; CHECK-NEXT:  .LBB2_2: # %return
    117 ; CHECK-NEXT:    retq
    118 entry:
    119   %cmp = icmp ugt i32 %a, %b
    120   br i1 %cmp, label %return, label %if.end
    121 
    122 if.end:
    123   %cmp1 = icmp ult i32 %a, %b
    124   %. = sext i1 %cmp1 to i32
    125   br label %return
    126 
    127 return:
    128   %retval.0 = phi i32 [ 1, %entry ], [ %., %if.end ]
    129   ret i32 %retval.0
    130 }
    131 
    132 ; rdar://11393714
    133 define i8* @bsd_memchr(i8* %s, i32 %a, i32 %c, i64 %n) nounwind ssp {
    134 ; CHECK-LABEL: bsd_memchr:
    135 ; CHECK:       # %bb.0: # %entry
    136 ; CHECK-NEXT:    testq %rcx, %rcx
    137 ; CHECK-NEXT:    je .LBB3_4
    138 ; CHECK-NEXT:  # %bb.1: # %preheader
    139 ; CHECK-NEXT:    movzbl %dl, %eax
    140 ; CHECK-NEXT:    .p2align 4, 0x90
    141 ; CHECK-NEXT:  .LBB3_2: # %do.body
    142 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
    143 ; CHECK-NEXT:    cmpl %eax, %esi
    144 ; CHECK-NEXT:    je .LBB3_5
    145 ; CHECK-NEXT:  # %bb.3: # %do.cond
    146 ; CHECK-NEXT:    # in Loop: Header=BB3_2 Depth=1
    147 ; CHECK-NEXT:    incq %rdi
    148 ; CHECK-NEXT:    decq %rcx
    149 ; CHECK-NEXT:    jne .LBB3_2
    150 ; CHECK-NEXT:  .LBB3_4:
    151 ; CHECK-NEXT:    xorl %edi, %edi
    152 ; CHECK-NEXT:  .LBB3_5: # %return
    153 ; CHECK-NEXT:    movq %rdi, %rax
    154 ; CHECK-NEXT:    retq
    155 entry:
    156   %cmp = icmp eq i64 %n, 0
    157   br i1 %cmp, label %return, label %preheader
    158 
    159 preheader:
    160   %conv2 = and i32 %c, 255
    161   br label %do.body
    162 
    163 do.body:
    164   %n.addr.0 = phi i64 [ %dec, %do.cond ], [ %n, %preheader ]
    165   %p.0 = phi i8* [ %incdec.ptr, %do.cond ], [ %s, %preheader ]
    166   %cmp3 = icmp eq i32 %a, %conv2
    167   br i1 %cmp3, label %return, label %do.cond
    168 
    169 do.cond:
    170   %incdec.ptr = getelementptr inbounds i8, i8* %p.0, i64 1
    171   %dec = add i64 %n.addr.0, -1
    172   %cmp6 = icmp eq i64 %dec, 0
    173   br i1 %cmp6, label %return, label %do.body
    174 
    175 return:
    176   %retval.0 = phi i8* [ null, %entry ], [ null, %do.cond ], [ %p.0, %do.body ]
    177   ret i8* %retval.0
    178 }
    179 
    180 ; PR13578
    181 @t2_global = external global i32
    182 
    183 declare i1 @t2_func()
    184 
    185 define i32 @t2() nounwind {
    186 ; CHECK-LABEL: t2:
    187 ; CHECK:       # %bb.0:
    188 ; CHECK-NEXT:    pushq %rax
    189 ; CHECK-NEXT:    movl $42, {{.*}}(%rip)
    190 ; CHECK-NEXT:    callq t2_func
    191 ; CHECK-NEXT:    testb $1, %al
    192 ; CHECK-NEXT:    je .LBB4_2
    193 ; CHECK-NEXT:  # %bb.1: # %a
    194 ; CHECK-NEXT:    movl {{.*}}(%rip), %eax
    195 ; CHECK-NEXT:    popq %rcx
    196 ; CHECK-NEXT:    retq
    197 ; CHECK-NEXT:  .LBB4_2: # %b
    198 ; CHECK-NEXT:    xorl %eax, %eax
    199 ; CHECK-NEXT:    popq %rcx
    200 ; CHECK-NEXT:    retq
    201   store i32 42, i32* @t2_global
    202   %c = call i1 @t2_func()
    203   br i1 %c, label %a, label %b
    204 
    205 a:
    206   %l = load i32, i32* @t2_global
    207   ret i32 %l
    208 
    209 b:
    210   ret i32 0
    211 }
    212 
    213