1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+mwaitx | FileCheck %s --check-prefix=GENERIC 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver4 | FileCheck %s --check-prefix=BDVER4 4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=ZNVER1 5 6 define void @foo(i8* %P, i32 %E, i32 %H) nounwind { 7 ; GENERIC-LABEL: foo: 8 ; GENERIC: # %bb.0: 9 ; GENERIC-NEXT: leaq (%rdi), %rax # sched: [1:0.50] 10 ; GENERIC-NEXT: movl %esi, %ecx # sched: [1:0.33] 11 ; GENERIC-NEXT: monitorx # sched: [100:0.33] 12 ; GENERIC-NEXT: retq # sched: [1:1.00] 13 ; 14 ; BDVER4-LABEL: foo: 15 ; BDVER4: # %bb.0: 16 ; BDVER4-NEXT: leaq (%rdi), %rax 17 ; BDVER4-NEXT: movl %esi, %ecx 18 ; BDVER4-NEXT: monitorx 19 ; BDVER4-NEXT: retq 20 ; 21 ; ZNVER1-LABEL: foo: 22 ; ZNVER1: # %bb.0: 23 ; ZNVER1-NEXT: leaq (%rdi), %rax # sched: [1:0.25] 24 ; ZNVER1-NEXT: movl %esi, %ecx # sched: [1:0.25] 25 ; ZNVER1-NEXT: monitorx # sched: [100:0.25] 26 ; ZNVER1-NEXT: retq # sched: [1:0.50] 27 tail call void @llvm.x86.monitorx(i8* %P, i32 %E, i32 %H) 28 ret void 29 } 30 declare void @llvm.x86.monitorx(i8*, i32, i32) nounwind 31 32 define void @bar(i32 %E, i32 %H, i32 %C) nounwind { 33 ; GENERIC-LABEL: bar: 34 ; GENERIC: # %bb.0: 35 ; GENERIC-NEXT: pushq %rbx # sched: [5:1.00] 36 ; GENERIC-NEXT: movl %edi, %ecx # sched: [1:0.33] 37 ; GENERIC-NEXT: movl %esi, %eax # sched: [1:0.33] 38 ; GENERIC-NEXT: movl %edx, %ebx # sched: [1:0.33] 39 ; GENERIC-NEXT: mwaitx # sched: [100:0.33] 40 ; GENERIC-NEXT: popq %rbx # sched: [6:0.50] 41 ; GENERIC-NEXT: retq # sched: [1:1.00] 42 ; 43 ; BDVER4-LABEL: bar: 44 ; BDVER4: # %bb.0: 45 ; BDVER4-NEXT: pushq %rbx 46 ; BDVER4-NEXT: movl %edi, %ecx 47 ; BDVER4-NEXT: movl %esi, %eax 48 ; BDVER4-NEXT: movl %edx, %ebx 49 ; BDVER4-NEXT: mwaitx 50 ; BDVER4-NEXT: popq %rbx 51 ; BDVER4-NEXT: retq 52 ; 53 ; ZNVER1-LABEL: bar: 54 ; ZNVER1: # %bb.0: 55 ; ZNVER1-NEXT: pushq %rbx # sched: [1:0.50] 56 ; ZNVER1-NEXT: movl %edi, %ecx # sched: [1:0.25] 57 ; ZNVER1-NEXT: movl %esi, %eax # sched: [1:0.25] 58 ; ZNVER1-NEXT: movl %edx, %ebx # sched: [1:0.25] 59 ; ZNVER1-NEXT: mwaitx # sched: [100:0.25] 60 ; ZNVER1-NEXT: popq %rbx # sched: [8:0.50] 61 ; ZNVER1-NEXT: retq # sched: [1:0.50] 62 tail call void @llvm.x86.mwaitx(i32 %E, i32 %H, i32 %C) 63 ret void 64 } 65 declare void @llvm.x86.mwaitx(i32, i32, i32) nounwind 66
