1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 | FileCheck %s 3 4 define i64 @atomicSub(i64* %a, i64 %b) nounwind { 5 ; CHECK-LABEL: atomicSub: 6 ; CHECK: # %bb.0: # %entry 7 ; CHECK-NEXT: pushl %ebp 8 ; CHECK-NEXT: pushl %ebx 9 ; CHECK-NEXT: pushl %edi 10 ; CHECK-NEXT: pushl %esi 11 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi 12 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edi 13 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebp 14 ; CHECK-NEXT: movl (%ebp), %eax 15 ; CHECK-NEXT: movl 4(%ebp), %edx 16 ; CHECK-NEXT: .p2align 4, 0x90 17 ; CHECK-NEXT: .LBB0_1: # %atomicrmw.start 18 ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 19 ; CHECK-NEXT: movl %eax, %ebx 20 ; CHECK-NEXT: subl %edi, %ebx 21 ; CHECK-NEXT: movl %edx, %ecx 22 ; CHECK-NEXT: sbbl %esi, %ecx 23 ; CHECK-NEXT: lock cmpxchg8b (%ebp) 24 ; CHECK-NEXT: jne .LBB0_1 25 ; CHECK-NEXT: # %bb.2: # %atomicrmw.end 26 ; CHECK-NEXT: popl %esi 27 ; CHECK-NEXT: popl %edi 28 ; CHECK-NEXT: popl %ebx 29 ; CHECK-NEXT: popl %ebp 30 ; CHECK-NEXT: retl 31 entry: 32 %0 = atomicrmw sub i64* %a, i64 %b seq_cst 33 ret i64 %0 34 } 35
