1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X86 3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X64 4 ; According to https://bugs.llvm.org/show_bug.cgi?id=32329 it checks DAG ISEL failure on SKX target 5 6 %struct.AA = type { i24, [4 x i8] } 7 8 @obj = external local_unnamed_addr global %struct.AA, align 8 9 @var_27 = external local_unnamed_addr constant i8, align 1 10 @var_2 = external local_unnamed_addr constant i16, align 2 11 @var_24 = external local_unnamed_addr constant i64, align 8 12 @var_310 = external local_unnamed_addr global i64, align 8 13 @var_50 = external local_unnamed_addr global i64, align 8 14 @var_205 = external local_unnamed_addr global i8, align 1 15 @var_218 = external local_unnamed_addr global i8, align 1 16 17 define void @foo() local_unnamed_addr { 18 ; X86-LABEL: foo: 19 ; X86: # %bb.0: # %entry 20 ; X86-NEXT: pushl %ebp 21 ; X86-NEXT: .cfi_def_cfa_offset 8 22 ; X86-NEXT: pushl %ebx 23 ; X86-NEXT: .cfi_def_cfa_offset 12 24 ; X86-NEXT: pushl %edi 25 ; X86-NEXT: .cfi_def_cfa_offset 16 26 ; X86-NEXT: pushl %esi 27 ; X86-NEXT: .cfi_def_cfa_offset 20 28 ; X86-NEXT: .cfi_offset %esi, -20 29 ; X86-NEXT: .cfi_offset %edi, -16 30 ; X86-NEXT: .cfi_offset %ebx, -12 31 ; X86-NEXT: .cfi_offset %ebp, -8 32 ; X86-NEXT: movl obj, %edx 33 ; X86-NEXT: movsbl var_27, %eax 34 ; X86-NEXT: movzwl var_2, %esi 35 ; X86-NEXT: movl var_310, %ecx 36 ; X86-NEXT: imull %eax, %ecx 37 ; X86-NEXT: addl var_24, %ecx 38 ; X86-NEXT: andl $4194303, %edx # imm = 0x3FFFFF 39 ; X86-NEXT: leal (%edx,%edx), %ebx 40 ; X86-NEXT: subl %eax, %ebx 41 ; X86-NEXT: movl %ebx, %edi 42 ; X86-NEXT: subl %esi, %edi 43 ; X86-NEXT: imull %edi, %ecx 44 ; X86-NEXT: addl $-1437483407, %ecx # imm = 0xAA51BE71 45 ; X86-NEXT: movl $9, %esi 46 ; X86-NEXT: xorl %ebp, %ebp 47 ; X86-NEXT: shldl %cl, %esi, %ebp 48 ; X86-NEXT: shll %cl, %esi 49 ; X86-NEXT: testb $32, %cl 50 ; X86-NEXT: cmovnel %esi, %ebp 51 ; X86-NEXT: movl $0, %ecx 52 ; X86-NEXT: cmovnel %ecx, %esi 53 ; X86-NEXT: cmpl %edx, %edi 54 ; X86-NEXT: movl %ebp, var_50+4 55 ; X86-NEXT: movl %esi, var_50 56 ; X86-NEXT: setge var_205 57 ; X86-NEXT: imull %eax, %ebx 58 ; X86-NEXT: movb %bl, var_218 59 ; X86-NEXT: popl %esi 60 ; X86-NEXT: .cfi_def_cfa_offset 16 61 ; X86-NEXT: popl %edi 62 ; X86-NEXT: .cfi_def_cfa_offset 12 63 ; X86-NEXT: popl %ebx 64 ; X86-NEXT: .cfi_def_cfa_offset 8 65 ; X86-NEXT: popl %ebp 66 ; X86-NEXT: .cfi_def_cfa_offset 4 67 ; X86-NEXT: retl 68 ; 69 ; X64-LABEL: foo: 70 ; X64: # %bb.0: # %entry 71 ; X64-NEXT: movl {{.*}}(%rip), %eax 72 ; X64-NEXT: movsbl {{.*}}(%rip), %r9d 73 ; X64-NEXT: movzwl {{.*}}(%rip), %r8d 74 ; X64-NEXT: movl {{.*}}(%rip), %ecx 75 ; X64-NEXT: imull %r9d, %ecx 76 ; X64-NEXT: addl {{.*}}(%rip), %ecx 77 ; X64-NEXT: andl $4194303, %eax # imm = 0x3FFFFF 78 ; X64-NEXT: leal (%rax,%rax), %edi 79 ; X64-NEXT: subl %r9d, %edi 80 ; X64-NEXT: movl %edi, %esi 81 ; X64-NEXT: subl %r8d, %esi 82 ; X64-NEXT: imull %esi, %ecx 83 ; X64-NEXT: addl $-1437483407, %ecx # imm = 0xAA51BE71 84 ; X64-NEXT: movl $9, %edx 85 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx 86 ; X64-NEXT: shlq %cl, %rdx 87 ; X64-NEXT: movq %rdx, {{.*}}(%rip) 88 ; X64-NEXT: cmpl %eax, %esi 89 ; X64-NEXT: setge {{.*}}(%rip) 90 ; X64-NEXT: imull %r9d, %edi 91 ; X64-NEXT: movb %dil, {{.*}}(%rip) 92 ; X64-NEXT: retq 93 entry: 94 %bf.load = load i32, i32* bitcast (%struct.AA* @obj to i32*), align 8 95 %bf.clear = shl i32 %bf.load, 1 96 %add = and i32 %bf.clear, 8388606 97 %0 = load i8, i8* @var_27, align 1 98 %conv5 = sext i8 %0 to i32 99 %sub = sub nsw i32 %add, %conv5 100 %1 = load i16, i16* @var_2, align 2 101 %conv6 = zext i16 %1 to i32 102 %sub7 = sub nsw i32 %sub, %conv6 103 %conv8 = sext i32 %sub7 to i64 104 %2 = load i64, i64* @var_24, align 8 105 %3 = load i64, i64* @var_310, align 8 106 %conv9 = sext i8 %0 to i64 107 %mul = mul i64 %3, %conv9 108 %add10 = add i64 %mul, %2 109 %mul11 = mul i64 %add10, %conv8 110 %sub12 = add i64 %mul11, 8662905354777116273 111 %shl = shl i64 9, %sub12 112 store i64 %shl, i64* @var_50, align 8 113 %bf.clear14 = and i32 %bf.load, 4194303 114 %add21 = shl nuw nsw i32 %bf.clear14, 1 115 %sub23 = sub nsw i32 %add21, %conv5 116 %sub25 = sub nsw i32 %sub23, %conv6 117 %cmp = icmp sge i32 %sub25, %bf.clear14 118 %conv30 = zext i1 %cmp to i8 119 store i8 %conv30, i8* @var_205, align 1 120 %mul43 = mul nsw i32 %sub, %conv5 121 %conv44 = trunc i32 %mul43 to i8 122 store i8 %conv44, i8* @var_218, align 1 123 ret void 124 } 125
