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      1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
      2 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
      3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
      4 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
      5 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
      6 
      7 define <2 x i64> @PR32907(<2 x i64> %astype.i, <2 x i64> %astype6.i) {
      8 ; SSE2-LABEL: PR32907:
      9 ; SSE2:       # %bb.0: # %entry
     10 ; SSE2-NEXT:    psubq %xmm1, %xmm0
     11 ; SSE2-NEXT:    movdqa %xmm0, %xmm1
     12 ; SSE2-NEXT:    psrad $31, %xmm1
     13 ; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
     14 ; SSE2-NEXT:    pxor %xmm1, %xmm1
     15 ; SSE2-NEXT:    psubq %xmm0, %xmm1
     16 ; SSE2-NEXT:    pand %xmm2, %xmm1
     17 ; SSE2-NEXT:    pandn %xmm0, %xmm2
     18 ; SSE2-NEXT:    por %xmm2, %xmm1
     19 ; SSE2-NEXT:    movdqa %xmm1, %xmm0
     20 ; SSE2-NEXT:    retq
     21 ;
     22 ; SSE42-LABEL: PR32907:
     23 ; SSE42:       # %bb.0: # %entry
     24 ; SSE42-NEXT:    psubq %xmm1, %xmm0
     25 ; SSE42-NEXT:    pxor %xmm1, %xmm1
     26 ; SSE42-NEXT:    pcmpgtq %xmm0, %xmm1
     27 ; SSE42-NEXT:    pxor %xmm1, %xmm0
     28 ; SSE42-NEXT:    psubq %xmm1, %xmm0
     29 ; SSE42-NEXT:    retq
     30 ;
     31 ; AVX2-LABEL: PR32907:
     32 ; AVX2:       # %bb.0: # %entry
     33 ; AVX2-NEXT:    vpsubq %xmm1, %xmm0, %xmm0
     34 ; AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1
     35 ; AVX2-NEXT:    vpcmpgtq %xmm0, %xmm1, %xmm1
     36 ; AVX2-NEXT:    vpxor %xmm1, %xmm0, %xmm0
     37 ; AVX2-NEXT:    vpsubq %xmm1, %xmm0, %xmm0
     38 ; AVX2-NEXT:    retq
     39 ;
     40 ; AVX512-LABEL: PR32907:
     41 ; AVX512:       # %bb.0: # %entry
     42 ; AVX512-NEXT:    vpsubq %xmm1, %xmm0, %xmm0
     43 ; AVX512-NEXT:    vpsraq $63, %zmm0, %zmm1
     44 ; AVX512-NEXT:    vpxor %xmm1, %xmm0, %xmm0
     45 ; AVX512-NEXT:    vpsubq %xmm1, %xmm0, %xmm0
     46 ; AVX512-NEXT:    vzeroupper
     47 ; AVX512-NEXT:    retq
     48 entry:
     49   %sub13.i = sub <2 x i64> %astype.i, %astype6.i
     50   %x.lobit.i.i = ashr <2 x i64> %sub13.i, <i64 63, i64 63>
     51   %sub.i.i = sub <2 x i64> zeroinitializer, %sub13.i
     52   %0 = xor <2 x i64> %x.lobit.i.i, <i64 -1, i64 -1>
     53   %1 = and <2 x i64> %sub13.i, %0
     54   %2 = and <2 x i64> %x.lobit.i.i, %sub.i.i
     55   %cond.i.i = or <2 x i64> %1, %2
     56   ret <2 x i64> %cond.i.i
     57 }
     58