1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+3dnowa -post-RA-scheduler=false | FileCheck %s --check-prefixes=CHECK,NOPOST 3 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+3dnowa -post-RA-scheduler=true | FileCheck %s --check-prefixes=CHECK,POST 4 5 define float @PR35982_emms(<1 x i64>) nounwind { 6 ; NOPOST-LABEL: PR35982_emms: 7 ; NOPOST: # %bb.0: 8 ; NOPOST-NEXT: pushl %ebp 9 ; NOPOST-NEXT: movl %esp, %ebp 10 ; NOPOST-NEXT: andl $-8, %esp 11 ; NOPOST-NEXT: subl $16, %esp 12 ; NOPOST-NEXT: movl 8(%ebp), %eax 13 ; NOPOST-NEXT: movl 12(%ebp), %ecx 14 ; NOPOST-NEXT: movl %ecx, {{[0-9]+}}(%esp) 15 ; NOPOST-NEXT: movl %eax, {{[0-9]+}}(%esp) 16 ; NOPOST-NEXT: movq {{[0-9]+}}(%esp), %mm0 17 ; NOPOST-NEXT: punpckhdq %mm0, %mm0 # mm0 = mm0[1,1] 18 ; NOPOST-NEXT: movd %mm0, %ecx 19 ; NOPOST-NEXT: emms 20 ; NOPOST-NEXT: movl %eax, (%esp) 21 ; NOPOST-NEXT: fildl (%esp) 22 ; NOPOST-NEXT: movl %ecx, {{[0-9]+}}(%esp) 23 ; NOPOST-NEXT: fiaddl {{[0-9]+}}(%esp) 24 ; NOPOST-NEXT: movl %ebp, %esp 25 ; NOPOST-NEXT: popl %ebp 26 ; NOPOST-NEXT: retl 27 ; 28 ; POST-LABEL: PR35982_emms: 29 ; POST: # %bb.0: 30 ; POST-NEXT: pushl %ebp 31 ; POST-NEXT: movl %esp, %ebp 32 ; POST-NEXT: andl $-8, %esp 33 ; POST-NEXT: subl $16, %esp 34 ; POST-NEXT: movl 8(%ebp), %eax 35 ; POST-NEXT: movl 12(%ebp), %ecx 36 ; POST-NEXT: movl %ecx, {{[0-9]+}}(%esp) 37 ; POST-NEXT: movl %eax, {{[0-9]+}}(%esp) 38 ; POST-NEXT: movq {{[0-9]+}}(%esp), %mm0 39 ; POST-NEXT: emms 40 ; POST-NEXT: movl %eax, (%esp) 41 ; POST-NEXT: fildl (%esp) 42 ; POST-NEXT: punpckhdq %mm0, %mm0 # mm0 = mm0[1,1] 43 ; POST-NEXT: movd %mm0, %ecx 44 ; POST-NEXT: movl %ecx, {{[0-9]+}}(%esp) 45 ; POST-NEXT: fiaddl {{[0-9]+}}(%esp) 46 ; POST-NEXT: movl %ebp, %esp 47 ; POST-NEXT: popl %ebp 48 ; POST-NEXT: retl 49 %2 = bitcast <1 x i64> %0 to <2 x i32> 50 %3 = extractelement <2 x i32> %2, i32 0 51 %4 = extractelement <1 x i64> %0, i32 0 52 %5 = bitcast i64 %4 to x86_mmx 53 %6 = tail call x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx %5, x86_mmx %5) 54 %7 = bitcast x86_mmx %6 to <2 x i32> 55 %8 = extractelement <2 x i32> %7, i32 0 56 tail call void @llvm.x86.mmx.emms() 57 %9 = sitofp i32 %3 to float 58 %10 = sitofp i32 %8 to float 59 %11 = fadd float %9, %10 60 ret float %11 61 } 62 63 define float @PR35982_femms(<1 x i64>) nounwind { 64 ; NOPOST-LABEL: PR35982_femms: 65 ; NOPOST: # %bb.0: 66 ; NOPOST-NEXT: pushl %ebp 67 ; NOPOST-NEXT: movl %esp, %ebp 68 ; NOPOST-NEXT: andl $-8, %esp 69 ; NOPOST-NEXT: subl $16, %esp 70 ; NOPOST-NEXT: movl 8(%ebp), %eax 71 ; NOPOST-NEXT: movl 12(%ebp), %ecx 72 ; NOPOST-NEXT: movl %ecx, {{[0-9]+}}(%esp) 73 ; NOPOST-NEXT: movl %eax, {{[0-9]+}}(%esp) 74 ; NOPOST-NEXT: movq {{[0-9]+}}(%esp), %mm0 75 ; NOPOST-NEXT: punpckhdq %mm0, %mm0 # mm0 = mm0[1,1] 76 ; NOPOST-NEXT: movd %mm0, %ecx 77 ; NOPOST-NEXT: femms 78 ; NOPOST-NEXT: movl %eax, (%esp) 79 ; NOPOST-NEXT: fildl (%esp) 80 ; NOPOST-NEXT: movl %ecx, {{[0-9]+}}(%esp) 81 ; NOPOST-NEXT: fiaddl {{[0-9]+}}(%esp) 82 ; NOPOST-NEXT: movl %ebp, %esp 83 ; NOPOST-NEXT: popl %ebp 84 ; NOPOST-NEXT: retl 85 ; 86 ; POST-LABEL: PR35982_femms: 87 ; POST: # %bb.0: 88 ; POST-NEXT: pushl %ebp 89 ; POST-NEXT: movl %esp, %ebp 90 ; POST-NEXT: andl $-8, %esp 91 ; POST-NEXT: subl $16, %esp 92 ; POST-NEXT: movl 8(%ebp), %eax 93 ; POST-NEXT: movl 12(%ebp), %ecx 94 ; POST-NEXT: movl %ecx, {{[0-9]+}}(%esp) 95 ; POST-NEXT: movl %eax, {{[0-9]+}}(%esp) 96 ; POST-NEXT: movq {{[0-9]+}}(%esp), %mm0 97 ; POST-NEXT: femms 98 ; POST-NEXT: movl %eax, (%esp) 99 ; POST-NEXT: fildl (%esp) 100 ; POST-NEXT: punpckhdq %mm0, %mm0 # mm0 = mm0[1,1] 101 ; POST-NEXT: movd %mm0, %ecx 102 ; POST-NEXT: movl %ecx, {{[0-9]+}}(%esp) 103 ; POST-NEXT: fiaddl {{[0-9]+}}(%esp) 104 ; POST-NEXT: movl %ebp, %esp 105 ; POST-NEXT: popl %ebp 106 ; POST-NEXT: retl 107 %2 = bitcast <1 x i64> %0 to <2 x i32> 108 %3 = extractelement <2 x i32> %2, i32 0 109 %4 = extractelement <1 x i64> %0, i32 0 110 %5 = bitcast i64 %4 to x86_mmx 111 %6 = tail call x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx %5, x86_mmx %5) 112 %7 = bitcast x86_mmx %6 to <2 x i32> 113 %8 = extractelement <2 x i32> %7, i32 0 114 tail call void @llvm.x86.mmx.femms() 115 %9 = sitofp i32 %3 to float 116 %10 = sitofp i32 %8 to float 117 %11 = fadd float %9, %10 118 ret float %11 119 } 120 121 declare x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx, x86_mmx) 122 declare void @llvm.x86.mmx.femms() 123 declare void @llvm.x86.mmx.emms() 124
