1 # RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass simple-register-coalescing -o - %s | FileCheck %s 2 # Check there is no partial redundent copy left in the loop after register coalescing. 3 --- | 4 ; ModuleID = '<stdin>' 5 source_filename = "<stdin>" 6 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 7 target triple = "x86_64-unknown-linux-gnu" 8 9 @b = common local_unnamed_addr global i8* null, align 8 10 @a = common local_unnamed_addr global i32 0, align 4 11 12 define i32 @foo() local_unnamed_addr { 13 entry: 14 %t0 = load i8*, i8** @b, align 8 15 %t1 = load i8, i8* %t0, align 1 16 %cmp4 = icmp eq i8 %t1, 0 17 %t2 = load i32, i32* @a, align 4 18 br i1 %cmp4, label %while.end, label %while.body.preheader 19 20 while.body.preheader: ; preds = %entry 21 br label %while.body 22 23 while.body: ; preds = %while.body, %while.body.preheader 24 %t3 = phi i32 [ %add3, %while.body ], [ %t2, %while.body.preheader ] 25 %t4 = phi i8 [ %t5, %while.body ], [ %t1, %while.body.preheader ] 26 %conv = sext i8 %t4 to i32 27 %add = mul i32 %t3, 33 28 %add3 = add nsw i32 %add, %conv 29 store i32 %add3, i32* @a, align 4 30 %t5 = load i8, i8* %t0, align 1 31 %cmp = icmp eq i8 %t5, 0 32 br i1 %cmp, label %while.end, label %while.body 33 34 while.end: ; preds = %while.body, %entry 35 %.lcssa = phi i32 [ %t2, %entry ], [ %add3, %while.body ] 36 ret i32 %.lcssa 37 } 38 39 ... 40 --- 41 # Check A = B and B = A copies will not exist in the loop at the same time. 42 # CHECK: name: foo 43 # CHECK: [[L1:bb.3]].{{[a-zA-Z0-9.]+}}: 44 # CHECK: %[[REGA:.*]] = COPY %[[REGB:.*]] 45 # CHECK-NOT: %[[REGB]] = COPY %[[REGA]] 46 # CHECK: JNE_1 %[[L1]] 47 48 name: foo 49 alignment: 4 50 exposesReturnsTwice: false 51 legalized: false 52 regBankSelected: false 53 selected: false 54 tracksRegLiveness: true 55 registers: 56 - { id: 0, class: gr64 } 57 - { id: 1, class: gr8 } 58 - { id: 2, class: gr32 } 59 - { id: 3, class: gr32 } 60 - { id: 4, class: gr8 } 61 - { id: 5, class: gr32 } 62 - { id: 6, class: gr8 } 63 - { id: 7, class: gr32 } 64 - { id: 8, class: gr32 } 65 - { id: 9, class: gr32 } 66 - { id: 10, class: gr32 } 67 - { id: 11, class: gr32 } 68 - { id: 12, class: gr8 } 69 - { id: 13, class: gr32 } 70 frameInfo: 71 isFrameAddressTaken: false 72 isReturnAddressTaken: false 73 hasStackMap: false 74 hasPatchPoint: false 75 stackSize: 0 76 offsetAdjustment: 0 77 maxAlignment: 0 78 adjustsStack: false 79 hasCalls: false 80 maxCallFrameSize: 0 81 hasOpaqueSPAdjustment: false 82 hasVAStart: false 83 hasMustTailInVarArgFunc: false 84 body: | 85 bb.0.entry: 86 %0 = MOV64rm $rip, 1, $noreg, @b, $noreg :: (dereferenceable load 8 from @b) 87 %12 = MOV8rm %0, 1, $noreg, 0, $noreg :: (load 1 from %ir.t0) 88 TEST8rr %12, %12, implicit-def $eflags 89 %11 = MOV32rm $rip, 1, $noreg, @a, $noreg :: (dereferenceable load 4 from @a) 90 JNE_1 %bb.1, implicit killed $eflags 91 92 bb.4: 93 %10 = COPY %11 94 JMP_1 %bb.3 95 96 bb.1.while.body.preheader: 97 98 bb.2.while.body: 99 %8 = MOVSX32rr8 %12 100 %10 = COPY %11 101 %10 = SHL32ri %10, 5, implicit-def dead $eflags 102 %10 = ADD32rr %10, %11, implicit-def dead $eflags 103 %10 = ADD32rr %10, %8, implicit-def dead $eflags 104 MOV32mr $rip, 1, $noreg, @a, $noreg, %10 :: (store 4 into @a) 105 %12 = MOV8rm %0, 1, $noreg, 0, $noreg :: (load 1 from %ir.t0) 106 TEST8rr %12, %12, implicit-def $eflags 107 %11 = COPY %10 108 JNE_1 %bb.2, implicit killed $eflags 109 JMP_1 %bb.3 110 111 bb.3.while.end: 112 $eax = COPY %10 113 RET 0, killed $eax 114 115 ... 116
