1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i686-- -mattr=+sse | FileCheck %s --check-prefix=SSE 3 ; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=SSE 4 ; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+prfchw | FileCheck %s -check-prefix=PRFCHWSSE 5 ; RUN: llc < %s -mtriple=i686-- -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHWSSE 6 ; RUN: llc < %s -mtriple=i686-- -mcpu=slm | FileCheck %s -check-prefix=PRFCHWSSE 7 ; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 | FileCheck %s -check-prefix=PRFCHWSSE 8 ; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=SSE 9 ; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+prefetchwt1 | FileCheck %s -check-prefix=PREFETCHWT1 10 ; RUN: llc < %s -mtriple=i686-- -mattr=-sse,+prefetchwt1 | FileCheck %s -check-prefix=PREFETCHWT1 11 ; RUN: llc < %s -mtriple=i686-- -mattr=-sse,+3dnow,+prefetchwt1 | FileCheck %s -check-prefix=PREFETCHWT1 12 ; RUN: llc < %s -mtriple=i686-- -mattr=+3dnow | FileCheck %s -check-prefix=3DNOW 13 ; RUN: llc < %s -mtriple=i686-- -mattr=+3dnow,+prfchw | FileCheck %s -check-prefix=PRFCHW3DNOW 14 15 ; Rules: 16 ; 3dnow by itself get you just the single prefetch instruction with no hints 17 ; sse provides prefetch0/1/2/nta 18 ; supporting prefetchw, but not 3dnow implicitly provides prefetcht0/1/2/nta regardless of sse setting as we need something to fall back to for the non-write hint. 19 ; supporting prefetchwt1 implies prefetcht0/1/2/nta and prefetchw regardless of other settings. this allows levels for non-write and gives us an instruction for write+T0 20 ; 3dnow prefetch instruction will only get used if you have no other prefetch instructions enabled 21 22 ; rdar://10538297 23 24 define void @t(i8* %ptr) nounwind { 25 ; SSE-LABEL: t: 26 ; SSE: # %bb.0: # %entry 27 ; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax 28 ; SSE-NEXT: prefetcht2 (%eax) 29 ; SSE-NEXT: prefetcht1 (%eax) 30 ; SSE-NEXT: prefetcht0 (%eax) 31 ; SSE-NEXT: prefetchnta (%eax) 32 ; SSE-NEXT: prefetcht2 (%eax) 33 ; SSE-NEXT: prefetcht1 (%eax) 34 ; SSE-NEXT: prefetcht0 (%eax) 35 ; SSE-NEXT: prefetchnta (%eax) 36 ; SSE-NEXT: retl 37 ; 38 ; PRFCHWSSE-LABEL: t: 39 ; PRFCHWSSE: # %bb.0: # %entry 40 ; PRFCHWSSE-NEXT: movl {{[0-9]+}}(%esp), %eax 41 ; PRFCHWSSE-NEXT: prefetcht2 (%eax) 42 ; PRFCHWSSE-NEXT: prefetcht1 (%eax) 43 ; PRFCHWSSE-NEXT: prefetcht0 (%eax) 44 ; PRFCHWSSE-NEXT: prefetchnta (%eax) 45 ; PRFCHWSSE-NEXT: prefetchw (%eax) 46 ; PRFCHWSSE-NEXT: prefetchw (%eax) 47 ; PRFCHWSSE-NEXT: prefetchw (%eax) 48 ; PRFCHWSSE-NEXT: prefetchw (%eax) 49 ; PRFCHWSSE-NEXT: retl 50 ; 51 ; PREFETCHWT1-LABEL: t: 52 ; PREFETCHWT1: # %bb.0: # %entry 53 ; PREFETCHWT1-NEXT: movl {{[0-9]+}}(%esp), %eax 54 ; PREFETCHWT1-NEXT: prefetcht2 (%eax) 55 ; PREFETCHWT1-NEXT: prefetcht1 (%eax) 56 ; PREFETCHWT1-NEXT: prefetcht0 (%eax) 57 ; PREFETCHWT1-NEXT: prefetchnta (%eax) 58 ; PREFETCHWT1-NEXT: prefetchwt1 (%eax) 59 ; PREFETCHWT1-NEXT: prefetchwt1 (%eax) 60 ; PREFETCHWT1-NEXT: prefetchw (%eax) 61 ; PREFETCHWT1-NEXT: prefetchwt1 (%eax) 62 ; PREFETCHWT1-NEXT: retl 63 ; 64 ; 3DNOW-LABEL: t: 65 ; 3DNOW: # %bb.0: # %entry 66 ; 3DNOW-NEXT: movl {{[0-9]+}}(%esp), %eax 67 ; 3DNOW-NEXT: prefetch (%eax) 68 ; 3DNOW-NEXT: prefetch (%eax) 69 ; 3DNOW-NEXT: prefetch (%eax) 70 ; 3DNOW-NEXT: prefetch (%eax) 71 ; 3DNOW-NEXT: prefetch (%eax) 72 ; 3DNOW-NEXT: prefetch (%eax) 73 ; 3DNOW-NEXT: prefetch (%eax) 74 ; 3DNOW-NEXT: prefetch (%eax) 75 ; 3DNOW-NEXT: retl 76 ; 77 ; PRFCHW3DNOW-LABEL: t: 78 ; PRFCHW3DNOW: # %bb.0: # %entry 79 ; PRFCHW3DNOW-NEXT: movl {{[0-9]+}}(%esp), %eax 80 ; PRFCHW3DNOW-NEXT: prefetch (%eax) 81 ; PRFCHW3DNOW-NEXT: prefetch (%eax) 82 ; PRFCHW3DNOW-NEXT: prefetch (%eax) 83 ; PRFCHW3DNOW-NEXT: prefetch (%eax) 84 ; PRFCHW3DNOW-NEXT: prefetchw (%eax) 85 ; PRFCHW3DNOW-NEXT: prefetchw (%eax) 86 ; PRFCHW3DNOW-NEXT: prefetchw (%eax) 87 ; PRFCHW3DNOW-NEXT: prefetchw (%eax) 88 ; PRFCHW3DNOW-NEXT: retl 89 entry: 90 tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 ) 91 tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 ) 92 tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 ) 93 tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0, i32 1 ) 94 tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 1, i32 1 ) 95 tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 2, i32 1 ) 96 tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 ) 97 tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 0, i32 1 ) 98 ret void 99 } 100 101 declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind 102
