1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=BASE 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=slow-3ops-lea | FileCheck %s --check-prefix=SLOWLEA3 4 5 ; TODO: Should the 'cmpl' be 'dec' instead? 6 ; TODO: What if 'cmov' is 1 uop and full throughput (Ryzen)? 7 8 define i32 @PR28968(i32 %x) { 9 ; BASE-LABEL: PR28968: 10 ; BASE: # %bb.0: 11 ; BASE-NEXT: xorl %eax, %eax 12 ; BASE-NEXT: cmpl $1, %edi 13 ; BASE-NEXT: sete %al 14 ; BASE-NEXT: leal -1(%rax,%rax), %eax 15 ; BASE-NEXT: retq 16 ; 17 ; SLOWLEA3-LABEL: PR28968: 18 ; SLOWLEA3: # %bb.0: 19 ; SLOWLEA3-NEXT: xorl %eax, %eax 20 ; SLOWLEA3-NEXT: cmpl $1, %edi 21 ; SLOWLEA3-NEXT: sete %al 22 ; SLOWLEA3-NEXT: leal (%rax,%rax), %eax 23 ; SLOWLEA3-NEXT: addl $-1, %eax 24 ; SLOWLEA3-NEXT: retq 25 %cmp = icmp eq i32 %x, 1 26 %sel = select i1 %cmp, i32 1, i32 -1 27 ret i32 %sel 28 } 29 30
