1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW 3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX2,AVX2-FAST 4 ; PR32449 5 6 define <2 x double> @foo2(<2 x double> %v, <2 x double> *%p) nounwind { 7 ; AVX2-LABEL: foo2: 8 ; AVX2: # %bb.0: 9 ; AVX2-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,1] 10 ; AVX2-NEXT: vmovapd %xmm0, (%rdi) 11 ; AVX2-NEXT: retq 12 %res = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 1, i32 1> 13 %res1 = shufflevector<2 x double> %res, <2 x double> undef, <2 x i32> <i32 1, i32 undef> 14 store <2 x double> %res, <2 x double>* %p 15 ret <2 x double> %res1 16 } 17 18 define <4 x double> @foo4(<4 x double> %v, <4 x double> *%p) nounwind { 19 ; AVX2-LABEL: foo4: 20 ; AVX2: # %bb.0: 21 ; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,2,2,2] 22 ; AVX2-NEXT: vmovaps %ymm0, (%rdi) 23 ; AVX2-NEXT: retq 24 %res = shufflevector <4 x double> %v, <4 x double> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2> 25 %res1 = shufflevector<4 x double> %res, <4 x double> undef, <4 x i32> <i32 2, i32 0, i32 undef, i32 undef> 26 store <4 x double> %res, <4 x double>* %p 27 ret <4 x double> %res1 28 } 29 30 define <8 x float> @foo8(<8 x float> %v, <8 x float> *%p) nounwind { 31 ; AVX2-SLOW-LABEL: foo8: 32 ; AVX2-SLOW: # %bb.0: 33 ; AVX2-SLOW-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] 34 ; AVX2-SLOW-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,2,2,2] 35 ; AVX2-SLOW-NEXT: vmovaps %ymm0, (%rdi) 36 ; AVX2-SLOW-NEXT: retq 37 ; 38 ; AVX2-FAST-LABEL: foo8: 39 ; AVX2-FAST: # %bb.0: 40 ; AVX2-FAST-NEXT: vbroadcastss {{.*#+}} ymm1 = [5,5,5,5,5,5,5,5] 41 ; AVX2-FAST-NEXT: vpermps %ymm0, %ymm1, %ymm0 42 ; AVX2-FAST-NEXT: vmovaps %ymm0, (%rdi) 43 ; AVX2-FAST-NEXT: retq 44 %res = shufflevector <8 x float> %v, <8 x float> undef, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5> 45 %res1 = shufflevector<8 x float> %res, <8 x float> undef, <8 x i32> <i32 2, i32 0, i32 undef, i32 undef, i32 5, i32 1, i32 3, i32 7> 46 store <8 x float> %res, <8 x float>* %p 47 ret <8 x float> %res1 48 } 49 50 define <4 x i32> @undef_splatmask(<4 x i32> %v) nounwind { 51 ; AVX2-LABEL: undef_splatmask: 52 ; AVX2: # %bb.0: 53 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3] 54 ; AVX2-NEXT: retq 55 %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef> 56 %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> 57 ret <4 x i32> %res1 58 } 59 60 define <4 x i32> @undef_splatmask2(<4 x i32> %v) nounwind { 61 ; AVX2-LABEL: undef_splatmask2: 62 ; AVX2: # %bb.0: 63 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3] 64 ; AVX2-NEXT: retq 65 %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 2, i32 undef> 66 %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> 67 ret <4 x i32> %res1 68 } 69 70 define <4 x i32> @undef_splatmask3(<4 x i32> %v) nounwind { 71 ; AVX2-LABEL: undef_splatmask3: 72 ; AVX2: # %bb.0: 73 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3] 74 ; AVX2-NEXT: retq 75 %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef> 76 %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 3> 77 ret <4 x i32> %res1 78 } 79 80 define <4 x i32> @undef_splatmask4(<4 x i32> %v, <4 x i32>* %p) nounwind { 81 ; AVX2-LABEL: undef_splatmask4: 82 ; AVX2: # %bb.0: 83 ; AVX2-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,2,3,3] 84 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,3,2,3] 85 ; AVX2-NEXT: vmovaps %xmm0, (%rdi) 86 ; AVX2-NEXT: vmovaps %xmm1, %xmm0 87 ; AVX2-NEXT: retq 88 %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 undef, i32 2, i32 undef> 89 %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef> 90 store <4 x i32> %res, <4 x i32>* %p 91 ret <4 x i32> %res1 92 } 93 94 define <4 x i32> @undef_splatmask5(<4 x i32> %v, <4 x i32>* %p) nounwind { 95 ; AVX2-LABEL: undef_splatmask5: 96 ; AVX2: # %bb.0: 97 ; AVX2-NEXT: vpbroadcastd %xmm0, %xmm1 98 ; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0 99 ; AVX2-NEXT: vmovdqa %xmm0, (%rdi) 100 ; AVX2-NEXT: vmovdqa %xmm1, %xmm0 101 ; AVX2-NEXT: retq 102 %res = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 0, i32 undef> 103 %res1 = shufflevector <4 x i32> %res, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 3> 104 store <4 x i32> %res, <4 x i32>* %p 105 ret <4 x i32> %res1 106 } 107
