1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -mtriple=x86_64-unknown-unknown -force-split-store < %s | FileCheck %s 3 4 define void @int32_float_pair(i32 %tmp1, float %tmp2, i64* %ref.tmp) { 5 ; CHECK-LABEL: int32_float_pair: 6 ; CHECK: # %bb.0: 7 ; CHECK-NEXT: movl %edi, (%rsi) 8 ; CHECK-NEXT: movss %xmm0, 4(%rsi) 9 ; CHECK-NEXT: retq 10 %t0 = bitcast float %tmp2 to i32 11 %t1 = zext i32 %t0 to i64 12 %t2 = shl nuw i64 %t1, 32 13 %t3 = zext i32 %tmp1 to i64 14 %t4 = or i64 %t2, %t3 15 store i64 %t4, i64* %ref.tmp, align 8 16 ret void 17 } 18 19 define void @float_int32_pair(float %tmp1, i32 %tmp2, i64* %ref.tmp) { 20 ; CHECK-LABEL: float_int32_pair: 21 ; CHECK: # %bb.0: 22 ; CHECK-NEXT: movss %xmm0, (%rsi) 23 ; CHECK-NEXT: movl %edi, 4(%rsi) 24 ; CHECK-NEXT: retq 25 %t0 = bitcast float %tmp1 to i32 26 %t1 = zext i32 %tmp2 to i64 27 %t2 = shl nuw i64 %t1, 32 28 %t3 = zext i32 %t0 to i64 29 %t4 = or i64 %t2, %t3 30 store i64 %t4, i64* %ref.tmp, align 8 31 ret void 32 } 33 34 define void @int16_float_pair(i16 signext %tmp1, float %tmp2, i64* %ref.tmp) { 35 ; CHECK-LABEL: int16_float_pair: 36 ; CHECK: # %bb.0: 37 ; CHECK-NEXT: movzwl %di, %eax 38 ; CHECK-NEXT: movl %eax, (%rsi) 39 ; CHECK-NEXT: movss %xmm0, 4(%rsi) 40 ; CHECK-NEXT: retq 41 %t0 = bitcast float %tmp2 to i32 42 %t1 = zext i32 %t0 to i64 43 %t2 = shl nuw i64 %t1, 32 44 %t3 = zext i16 %tmp1 to i64 45 %t4 = or i64 %t2, %t3 46 store i64 %t4, i64* %ref.tmp, align 8 47 ret void 48 } 49 50 define void @int8_float_pair(i8 signext %tmp1, float %tmp2, i64* %ref.tmp) { 51 ; CHECK-LABEL: int8_float_pair: 52 ; CHECK: # %bb.0: 53 ; CHECK-NEXT: movzbl %dil, %eax 54 ; CHECK-NEXT: movl %eax, (%rsi) 55 ; CHECK-NEXT: movss %xmm0, 4(%rsi) 56 ; CHECK-NEXT: retq 57 %t0 = bitcast float %tmp2 to i32 58 %t1 = zext i32 %t0 to i64 59 %t2 = shl nuw i64 %t1, 32 60 %t3 = zext i8 %tmp1 to i64 61 %t4 = or i64 %t2, %t3 62 store i64 %t4, i64* %ref.tmp, align 8 63 ret void 64 } 65 66 define void @int32_int32_pair(i32 %tmp1, i32 %tmp2, i64* %ref.tmp) { 67 ; CHECK-LABEL: int32_int32_pair: 68 ; CHECK: # %bb.0: 69 ; CHECK-NEXT: movl %edi, (%rdx) 70 ; CHECK-NEXT: movl %esi, 4(%rdx) 71 ; CHECK-NEXT: retq 72 %t1 = zext i32 %tmp2 to i64 73 %t2 = shl nuw i64 %t1, 32 74 %t3 = zext i32 %tmp1 to i64 75 %t4 = or i64 %t2, %t3 76 store i64 %t4, i64* %ref.tmp, align 8 77 ret void 78 } 79 80 define void @int16_int16_pair(i16 signext %tmp1, i16 signext %tmp2, i32* %ref.tmp) { 81 ; CHECK-LABEL: int16_int16_pair: 82 ; CHECK: # %bb.0: 83 ; CHECK-NEXT: movw %di, (%rdx) 84 ; CHECK-NEXT: movw %si, 2(%rdx) 85 ; CHECK-NEXT: retq 86 %t1 = zext i16 %tmp2 to i32 87 %t2 = shl nuw i32 %t1, 16 88 %t3 = zext i16 %tmp1 to i32 89 %t4 = or i32 %t2, %t3 90 store i32 %t4, i32* %ref.tmp, align 4 91 ret void 92 } 93 94 define void @int8_int8_pair(i8 signext %tmp1, i8 signext %tmp2, i16* %ref.tmp) { 95 ; CHECK-LABEL: int8_int8_pair: 96 ; CHECK: # %bb.0: 97 ; CHECK-NEXT: movb %dil, (%rdx) 98 ; CHECK-NEXT: movb %sil, 1(%rdx) 99 ; CHECK-NEXT: retq 100 %t1 = zext i8 %tmp2 to i16 101 %t2 = shl nuw i16 %t1, 8 102 %t3 = zext i8 %tmp1 to i16 103 %t4 = or i16 %t2, %t3 104 store i16 %t4, i16* %ref.tmp, align 2 105 ret void 106 } 107 108 define void @int31_int31_pair(i31 %tmp1, i31 %tmp2, i64* %ref.tmp) { 109 ; CHECK-LABEL: int31_int31_pair: 110 ; CHECK: # %bb.0: 111 ; CHECK-NEXT: andl $2147483647, %edi # imm = 0x7FFFFFFF 112 ; CHECK-NEXT: movl %edi, (%rdx) 113 ; CHECK-NEXT: andl $2147483647, %esi # imm = 0x7FFFFFFF 114 ; CHECK-NEXT: movl %esi, 4(%rdx) 115 ; CHECK-NEXT: retq 116 %t1 = zext i31 %tmp2 to i64 117 %t2 = shl nuw i64 %t1, 32 118 %t3 = zext i31 %tmp1 to i64 119 %t4 = or i64 %t2, %t3 120 store i64 %t4, i64* %ref.tmp, align 8 121 ret void 122 } 123 124 define void @int31_int17_pair(i31 %tmp1, i17 %tmp2, i64* %ref.tmp) { 125 ; CHECK-LABEL: int31_int17_pair: 126 ; CHECK: # %bb.0: 127 ; CHECK-NEXT: andl $2147483647, %edi # imm = 0x7FFFFFFF 128 ; CHECK-NEXT: movl %edi, (%rdx) 129 ; CHECK-NEXT: andl $131071, %esi # imm = 0x1FFFF 130 ; CHECK-NEXT: movl %esi, 4(%rdx) 131 ; CHECK-NEXT: retq 132 %t1 = zext i17 %tmp2 to i64 133 %t2 = shl nuw i64 %t1, 32 134 %t3 = zext i31 %tmp1 to i64 135 %t4 = or i64 %t2, %t3 136 store i64 %t4, i64* %ref.tmp, align 8 137 ret void 138 } 139 140 define void @int7_int3_pair(i7 signext %tmp1, i3 signext %tmp2, i16* %ref.tmp) { 141 ; CHECK-LABEL: int7_int3_pair: 142 ; CHECK: # %bb.0: 143 ; CHECK-NEXT: andb $127, %dil 144 ; CHECK-NEXT: movb %dil, (%rdx) 145 ; CHECK-NEXT: andb $7, %sil 146 ; CHECK-NEXT: movb %sil, 1(%rdx) 147 ; CHECK-NEXT: retq 148 %t1 = zext i3 %tmp2 to i16 149 %t2 = shl nuw i16 %t1, 8 150 %t3 = zext i7 %tmp1 to i16 151 %t4 = or i16 %t2, %t3 152 store i16 %t4, i16* %ref.tmp, align 2 153 ret void 154 } 155 156 define void @int24_int24_pair(i24 signext %tmp1, i24 signext %tmp2, i48* %ref.tmp) { 157 ; CHECK-LABEL: int24_int24_pair: 158 ; CHECK: # %bb.0: 159 ; CHECK-NEXT: movw %di, (%rdx) 160 ; CHECK-NEXT: shrl $16, %edi 161 ; CHECK-NEXT: movb %dil, 2(%rdx) 162 ; CHECK-NEXT: movw %si, 4(%rdx) 163 ; CHECK-NEXT: shrl $16, %esi 164 ; CHECK-NEXT: movb %sil, 6(%rdx) 165 ; CHECK-NEXT: retq 166 %t1 = zext i24 %tmp2 to i48 167 %t2 = shl nuw i48 %t1, 24 168 %t3 = zext i24 %tmp1 to i48 169 %t4 = or i48 %t2, %t3 170 store i48 %t4, i48* %ref.tmp, align 2 171 ret void 172 } 173 174 ; getTypeSizeInBits(i12) != getTypeStoreSizeInBits(i12), so store split doesn't kick in. 175 176 define void @int12_int12_pair(i12 signext %tmp1, i12 signext %tmp2, i24* %ref.tmp) { 177 ; CHECK-LABEL: int12_int12_pair: 178 ; CHECK: # %bb.0: 179 ; CHECK-NEXT: movl %esi, %eax 180 ; CHECK-NEXT: shll $12, %eax 181 ; CHECK-NEXT: andl $4095, %edi # imm = 0xFFF 182 ; CHECK-NEXT: orl %eax, %edi 183 ; CHECK-NEXT: shrl $4, %esi 184 ; CHECK-NEXT: movb %sil, 2(%rdx) 185 ; CHECK-NEXT: movw %di, (%rdx) 186 ; CHECK-NEXT: retq 187 %t1 = zext i12 %tmp2 to i24 188 %t2 = shl nuw i24 %t1, 12 189 %t3 = zext i12 %tmp1 to i24 190 %t4 = or i24 %t2, %t3 191 store i24 %t4, i24* %ref.tmp, align 2 192 ret void 193 } 194 195 ; getTypeSizeInBits(i14) != getTypeStoreSizeInBits(i14), so store split doesn't kick in. 196 197 define void @int7_int7_pair(i7 signext %tmp1, i7 signext %tmp2, i14* %ref.tmp) { 198 ; CHECK-LABEL: int7_int7_pair: 199 ; CHECK: # %bb.0: 200 ; CHECK-NEXT: shll $7, %esi 201 ; CHECK-NEXT: andl $127, %edi 202 ; CHECK-NEXT: orl %esi, %edi 203 ; CHECK-NEXT: andl $16383, %edi # imm = 0x3FFF 204 ; CHECK-NEXT: movw %di, (%rdx) 205 ; CHECK-NEXT: retq 206 %t1 = zext i7 %tmp2 to i14 207 %t2 = shl nuw i14 %t1, 7 208 %t3 = zext i7 %tmp1 to i14 209 %t4 = or i14 %t2, %t3 210 store i14 %t4, i14* %ref.tmp, align 2 211 ret void 212 } 213 214 ; getTypeSizeInBits(i2) != getTypeStoreSizeInBits(i2), so store split doesn't kick in. 215 216 define void @int1_int1_pair(i1 signext %tmp1, i1 signext %tmp2, i2* %ref.tmp) { 217 ; CHECK-LABEL: int1_int1_pair: 218 ; CHECK: # %bb.0: 219 ; CHECK-NEXT: addb %sil, %sil 220 ; CHECK-NEXT: andb $1, %dil 221 ; CHECK-NEXT: orb %sil, %dil 222 ; CHECK-NEXT: andb $3, %dil 223 ; CHECK-NEXT: movb %dil, (%rdx) 224 ; CHECK-NEXT: retq 225 %t1 = zext i1 %tmp2 to i2 226 %t2 = shl nuw i2 %t1, 1 227 %t3 = zext i1 %tmp1 to i2 228 %t4 = or i2 %t2, %t3 229 store i2 %t4, i2* %ref.tmp, align 1 230 ret void 231 } 232 233 define void @mbb_int32_float_pair(i32 %tmp1, float %tmp2, i64* %ref.tmp) { 234 ; CHECK-LABEL: mbb_int32_float_pair: 235 ; CHECK: # %bb.0: # %entry 236 ; CHECK-NEXT: movl %edi, (%rsi) 237 ; CHECK-NEXT: movss %xmm0, 4(%rsi) 238 ; CHECK-NEXT: retq 239 entry: 240 %t0 = bitcast float %tmp2 to i32 241 br label %next 242 next: 243 %t1 = zext i32 %t0 to i64 244 %t2 = shl nuw i64 %t1, 32 245 %t3 = zext i32 %tmp1 to i64 246 %t4 = or i64 %t2, %t3 247 store i64 %t4, i64* %ref.tmp, align 8 248 ret void 249 } 250 251 define void @mbb_int32_float_multi_stores(i32 %tmp1, float %tmp2, i64* %ref.tmp, i64* %ref.tmp1, i1 %cmp) { 252 ; CHECK-LABEL: mbb_int32_float_multi_stores: 253 ; CHECK: # %bb.0: # %entry 254 ; CHECK-NEXT: movl %edi, (%rsi) 255 ; CHECK-NEXT: movss %xmm0, 4(%rsi) 256 ; CHECK-NEXT: testb $1, %cl 257 ; CHECK-NEXT: je .LBB15_2 258 ; CHECK-NEXT: # %bb.1: # %bb2 259 ; CHECK-NEXT: movl %edi, (%rdx) 260 ; CHECK-NEXT: movss %xmm0, 4(%rdx) 261 ; CHECK-NEXT: .LBB15_2: # %exitbb 262 ; CHECK-NEXT: retq 263 entry: 264 %t0 = bitcast float %tmp2 to i32 265 br label %bb1 266 bb1: 267 %t1 = zext i32 %t0 to i64 268 %t2 = shl nuw i64 %t1, 32 269 %t3 = zext i32 %tmp1 to i64 270 %t4 = or i64 %t2, %t3 271 store i64 %t4, i64* %ref.tmp, align 8 272 br i1 %cmp, label %bb2, label %exitbb 273 bb2: 274 store i64 %t4, i64* %ref.tmp1, align 8 275 br label %exitbb 276 exitbb: 277 ret void 278 } 279
