1 ; rdar://7860110 2 ; RUN: llc -mtriple=x86_64-apple-darwin10.2 -asm-verbose=false < %s | FileCheck %s -check-prefix=X64 3 ; RUN: llc -mtriple=i686-apple-darwin10.2 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON 4 ; RUN: llc -mtriple=i686-apple-darwin10.2 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF 5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 6 7 define void @test1(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp { 8 entry: 9 %A = load i32, i32* %a0, align 4 10 %B = and i32 %A, -256 ; 0xFFFFFF00 11 %C = zext i8 %a1 to i32 12 %D = or i32 %C, %B 13 store i32 %D, i32* %a0, align 4 14 ret void 15 16 ; X64-LABEL: test1: 17 ; X64: movb %sil, (%rdi) 18 19 ; X32-LABEL: test1: 20 ; X32: movb 8(%esp), %al 21 ; X32: movb %al, (%{{.*}}) 22 } 23 24 define void @test2(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp { 25 entry: 26 %A = load i32, i32* %a0, align 4 27 %B = and i32 %A, -65281 ; 0xFFFF00FF 28 %C = zext i8 %a1 to i32 29 %CS = shl i32 %C, 8 30 %D = or i32 %B, %CS 31 store i32 %D, i32* %a0, align 4 32 ret void 33 ; X64-LABEL: test2: 34 ; X64: movb %sil, 1(%rdi) 35 36 ; X32-LABEL: test2: 37 ; X32: movb 8(%esp), %[[REG:[abcd]]]l 38 ; X32: movb %[[REG]]l, 1(%{{.*}}) 39 } 40 41 define void @test3(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp { 42 entry: 43 %A = load i32, i32* %a0, align 4 44 %B = and i32 %A, -65536 ; 0xFFFF0000 45 %C = zext i16 %a1 to i32 46 %D = or i32 %B, %C 47 store i32 %D, i32* %a0, align 4 48 ret void 49 ; X64-LABEL: test3: 50 ; X64: movw %si, (%rdi) 51 52 ; X32-LABEL: test3: 53 ; X32-BWON: movzwl 8(%esp), %eax 54 ; X32-BWOFF: movw 8(%esp), %ax 55 ; X32: movw %ax, (%{{.*}}) 56 } 57 58 define void @test4(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp { 59 entry: 60 %A = load i32, i32* %a0, align 4 61 %B = and i32 %A, 65535 ; 0x0000FFFF 62 %C = zext i16 %a1 to i32 63 %CS = shl i32 %C, 16 64 %D = or i32 %B, %CS 65 store i32 %D, i32* %a0, align 4 66 ret void 67 ; X64-LABEL: test4: 68 ; X64: movw %si, 2(%rdi) 69 70 ; X32-LABEL: test4: 71 ; X32-BWON: movzwl 8(%esp), %e[[REG:[abcd]]]x 72 ; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x 73 ; X32: movw %[[REG]]x, 2(%{{.*}}) 74 } 75 76 define void @test5(i64* nocapture %a0, i16 zeroext %a1) nounwind ssp { 77 entry: 78 %A = load i64, i64* %a0, align 4 79 %B = and i64 %A, -4294901761 ; 0xFFFFFFFF0000FFFF 80 %C = zext i16 %a1 to i64 81 %CS = shl i64 %C, 16 82 %D = or i64 %B, %CS 83 store i64 %D, i64* %a0, align 4 84 ret void 85 ; X64-LABEL: test5: 86 ; X64: movw %si, 2(%rdi) 87 88 ; X32-LABEL: test5: 89 ; X32-BWON: movzwl 8(%esp), %e[[REG:[abcd]]]x 90 ; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x 91 ; X32: movw %[[REG]]x, 2(%{{.*}}) 92 } 93 94 define void @test6(i64* nocapture %a0, i8 zeroext %a1) nounwind ssp { 95 entry: 96 %A = load i64, i64* %a0, align 4 97 %B = and i64 %A, -280375465082881 ; 0xFFFF00FFFFFFFFFF 98 %C = zext i8 %a1 to i64 99 %CS = shl i64 %C, 40 100 %D = or i64 %B, %CS 101 store i64 %D, i64* %a0, align 4 102 ret void 103 ; X64-LABEL: test6: 104 ; X64: movb %sil, 5(%rdi) 105 106 107 ; X32-LABEL: test6: 108 ; X32: movb 8(%esp), %[[REG:[abcd]l]] 109 ; X32: movb %[[REG]], 5(%{{.*}}) 110 } 111 112 define i32 @test7(i64* nocapture %a0, i8 zeroext %a1, i32* %P2) nounwind { 113 entry: 114 %OtherLoad = load i32 , i32 *%P2 115 %A = load i64, i64* %a0, align 4 116 %B = and i64 %A, -280375465082881 ; 0xFFFF00FFFFFFFFFF 117 %C = zext i8 %a1 to i64 118 %CS = shl i64 %C, 40 119 %D = or i64 %B, %CS 120 store i64 %D, i64* %a0, align 4 121 ret i32 %OtherLoad 122 ; X64-LABEL: test7: 123 ; X64: movb %sil, 5(%rdi) 124 125 126 ; X32-LABEL: test7: 127 ; X32: movb 8(%esp), %[[REG:[abcd]l]] 128 ; X32: movb %[[REG]], 5(%{{.*}}) 129 } 130 131 ; PR7833 132 133 @g_16 = internal global i32 -1 134 135 ; X64-LABEL: test8: 136 ; X64-NEXT: orb $1, _g_16(%rip) 137 ; X64-NEXT: ret 138 define void @test8() nounwind { 139 %tmp = load i32, i32* @g_16 140 store i32 0, i32* @g_16 141 %or = or i32 %tmp, 1 142 store i32 %or, i32* @g_16 143 ret void 144 } 145 146 ; X64-LABEL: test9: 147 ; X64-NEXT: orb $1, _g_16(%rip) 148 ; X64-NEXT: ret 149 define void @test9() nounwind { 150 %tmp = load i32, i32* @g_16 151 %or = or i32 %tmp, 1 152 store i32 %or, i32* @g_16 153 ret void 154 } 155 156 ; rdar://8494845 + PR8244 157 ; X64-LABEL: test10: 158 ; X64-NEXT: movsbl (%rdi), %eax 159 ; X64-NEXT: shrl $8, %eax 160 ; X64-NEXT: ret 161 define i8 @test10(i8* %P) nounwind ssp { 162 entry: 163 %tmp = load i8, i8* %P, align 1 164 %conv = sext i8 %tmp to i32 165 %shr3 = lshr i32 %conv, 8 166 %conv2 = trunc i32 %shr3 to i8 167 ret i8 %conv2 168 } 169
