1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86 3 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -relocation-model=pic | FileCheck %s --check-prefix=X32 4 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64 5 6 @i = thread_local global i32 15 7 @i2 = external thread_local global i32 8 9 define i32 @f1() { 10 ; X86-LABEL: f1: 11 ; X86: # %bb.0: # %entry 12 ; X86-NEXT: movl %gs:i@NTPOFF, %eax 13 ; X86-NEXT: retl 14 ; 15 ; X32-LABEL: f1: 16 ; X32: # %bb.0: # %entry 17 ; X32-NEXT: movl %fs:i@TPOFF, %eax 18 ; X32-NEXT: retq 19 ; 20 ; X64-LABEL: f1: 21 ; X64: # %bb.0: # %entry 22 ; X64-NEXT: movl %fs:i@TPOFF, %eax 23 ; X64-NEXT: retq 24 entry: 25 %tmp1 = load i32, i32* @i 26 ret i32 %tmp1 27 } 28 29 define i32* @f2() { 30 ; X86-LABEL: f2: 31 ; X86: # %bb.0: # %entry 32 ; X86-NEXT: movl %gs:0, %eax 33 ; X86-NEXT: leal i@NTPOFF(%eax), %eax 34 ; X86-NEXT: retl 35 ; 36 ; X32-LABEL: f2: 37 ; X32: # %bb.0: # %entry 38 ; X32-NEXT: movl %fs:0, %eax 39 ; X32-NEXT: leal i@TPOFF(%rax), %eax 40 ; X32-NEXT: retq 41 ; 42 ; X64-LABEL: f2: 43 ; X64: # %bb.0: # %entry 44 ; X64-NEXT: movq %fs:0, %rax 45 ; X64-NEXT: leaq i@TPOFF(%rax), %rax 46 ; X64-NEXT: retq 47 entry: 48 ret i32* @i 49 } 50 51 define i32 @f3() { 52 ; X86-LABEL: f3: 53 ; X86: # %bb.0: # %entry 54 ; X86-NEXT: calll .L2$pb 55 ; X86-NEXT: .cfi_adjust_cfa_offset 4 56 ; X86-NEXT: .L2$pb: 57 ; X86-NEXT: popl %eax 58 ; X86-NEXT: .cfi_adjust_cfa_offset -4 59 ; X86-NEXT: .Ltmp0: 60 ; X86-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L2$pb), %eax 61 ; X86-NEXT: movl i2@GOTNTPOFF(%eax), %eax 62 ; X86-NEXT: movl %gs:(%eax), %eax 63 ; X86-NEXT: retl 64 ; 65 ; X32-LABEL: f3: 66 ; X32: # %bb.0: # %entry 67 ; X32-NEXT: movl i2@{{.*}}(%rip), %eax 68 ; X32-NEXT: movl %fs:(%eax), %eax 69 ; X32-NEXT: retq 70 ; 71 ; X64-LABEL: f3: 72 ; X64: # %bb.0: # %entry 73 ; X64-NEXT: movq i2@{{.*}}(%rip), %rax 74 ; X64-NEXT: movl %fs:(%rax), %eax 75 ; X64-NEXT: retq 76 entry: 77 %tmp1 = load i32, i32* @i2 78 ret i32 %tmp1 79 } 80 81 define i32* @f4() { 82 ; X86-LABEL: f4: 83 ; X86: # %bb.0: # %entry 84 ; X86-NEXT: calll .L3$pb 85 ; X86-NEXT: .cfi_adjust_cfa_offset 4 86 ; X86-NEXT: .L3$pb: 87 ; X86-NEXT: popl %ecx 88 ; X86-NEXT: .cfi_adjust_cfa_offset -4 89 ; X86-NEXT: .Ltmp1: 90 ; X86-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp1-.L3$pb), %ecx 91 ; X86-NEXT: movl %gs:0, %eax 92 ; X86-NEXT: addl i2@GOTNTPOFF(%ecx), %eax 93 ; X86-NEXT: retl 94 ; 95 ; X32-LABEL: f4: 96 ; X32: # %bb.0: # %entry 97 ; X32-NEXT: movl %fs:0, %eax 98 ; X32-NEXT: addl i2@{{.*}}(%rip), %eax 99 ; X32-NEXT: retq 100 ; 101 ; X64-LABEL: f4: 102 ; X64: # %bb.0: # %entry 103 ; X64-NEXT: movq %fs:0, %rax 104 ; X64-NEXT: addq i2@{{.*}}(%rip), %rax 105 ; X64-NEXT: retq 106 entry: 107 ret i32* @i2 108 } 109 110 !llvm.module.flags = !{!0, !1} 111 !0 = !{i32 1, !"PIC Level", i32 1} 112 !1 = !{i32 1, !"PIE Level", i32 1} 113
