1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s 3 4 define i32 @add_undef_rhs(i32 %x) { 5 ; CHECK-LABEL: add_undef_rhs: 6 ; CHECK: # %bb.0: 7 ; CHECK-NEXT: retq 8 %r = add i32 %x, undef 9 ret i32 %r 10 } 11 12 define <4 x i32> @add_undef_rhs_vec(<4 x i32> %x) { 13 ; CHECK-LABEL: add_undef_rhs_vec: 14 ; CHECK: # %bb.0: 15 ; CHECK-NEXT: retq 16 %r = add <4 x i32> %x, undef 17 ret <4 x i32> %r 18 } 19 20 define i32 @add_undef_lhs(i32 %x) { 21 ; CHECK-LABEL: add_undef_lhs: 22 ; CHECK: # %bb.0: 23 ; CHECK-NEXT: retq 24 %r = add i32 undef, %x 25 ret i32 %r 26 } 27 28 define <4 x i32> @add_undef_lhs_vec(<4 x i32> %x) { 29 ; CHECK-LABEL: add_undef_lhs_vec: 30 ; CHECK: # %bb.0: 31 ; CHECK-NEXT: retq 32 %r = add <4 x i32> undef, %x 33 ret <4 x i32> %r 34 } 35 36 define i32 @sub_undef_rhs(i32 %x) { 37 ; CHECK-LABEL: sub_undef_rhs: 38 ; CHECK: # %bb.0: 39 ; CHECK-NEXT: retq 40 %r = sub i32 %x, undef 41 ret i32 %r 42 } 43 44 define <4 x i32> @sub_undef_rhs_vec(<4 x i32> %x) { 45 ; CHECK-LABEL: sub_undef_rhs_vec: 46 ; CHECK: # %bb.0: 47 ; CHECK-NEXT: retq 48 %r = sub <4 x i32> %x, undef 49 ret <4 x i32> %r 50 } 51 52 define i32 @sub_undef_lhs(i32 %x) { 53 ; CHECK-LABEL: sub_undef_lhs: 54 ; CHECK: # %bb.0: 55 ; CHECK-NEXT: retq 56 %r = sub i32 undef, %x 57 ret i32 %r 58 } 59 60 define <4 x i32> @sub_undef_lhs_vec(<4 x i32> %x) { 61 ; CHECK-LABEL: sub_undef_lhs_vec: 62 ; CHECK: # %bb.0: 63 ; CHECK-NEXT: retq 64 %r = sub <4 x i32> undef, %x 65 ret <4 x i32> %r 66 } 67 68 define i32 @mul_undef_rhs(i32 %x) { 69 ; CHECK-LABEL: mul_undef_rhs: 70 ; CHECK: # %bb.0: 71 ; CHECK-NEXT: xorl %eax, %eax 72 ; CHECK-NEXT: retq 73 %r = mul i32 %x, undef 74 ret i32 %r 75 } 76 77 define <4 x i32> @mul_undef_rhs_vec(<4 x i32> %x) { 78 ; CHECK-LABEL: mul_undef_rhs_vec: 79 ; CHECK: # %bb.0: 80 ; CHECK-NEXT: xorps %xmm0, %xmm0 81 ; CHECK-NEXT: retq 82 %r = mul <4 x i32> %x, undef 83 ret <4 x i32> %r 84 } 85 86 define i32 @mul_undef_lhs(i32 %x) { 87 ; CHECK-LABEL: mul_undef_lhs: 88 ; CHECK: # %bb.0: 89 ; CHECK-NEXT: xorl %eax, %eax 90 ; CHECK-NEXT: retq 91 %r = mul i32 undef, %x 92 ret i32 %r 93 } 94 95 define <4 x i32> @mul_undef_lhs_vec(<4 x i32> %x) { 96 ; CHECK-LABEL: mul_undef_lhs_vec: 97 ; CHECK: # %bb.0: 98 ; CHECK-NEXT: xorps %xmm0, %xmm0 99 ; CHECK-NEXT: retq 100 %r = mul <4 x i32> undef, %x 101 ret <4 x i32> %r 102 } 103 104 define i32 @sdiv_undef_rhs(i32 %x) { 105 ; CHECK-LABEL: sdiv_undef_rhs: 106 ; CHECK: # %bb.0: 107 ; CHECK-NEXT: retq 108 %r = sdiv i32 %x, undef 109 ret i32 %r 110 } 111 112 define <4 x i32> @sdiv_undef_rhs_vec(<4 x i32> %x) { 113 ; CHECK-LABEL: sdiv_undef_rhs_vec: 114 ; CHECK: # %bb.0: 115 ; CHECK-NEXT: retq 116 %r = sdiv <4 x i32> %x, undef 117 ret <4 x i32> %r 118 } 119 120 define i32 @sdiv_undef_lhs(i32 %x) { 121 ; CHECK-LABEL: sdiv_undef_lhs: 122 ; CHECK: # %bb.0: 123 ; CHECK-NEXT: xorl %eax, %eax 124 ; CHECK-NEXT: retq 125 %r = sdiv i32 undef, %x 126 ret i32 %r 127 } 128 129 define <4 x i32> @sdiv_undef_lhs_vec(<4 x i32> %x) { 130 ; CHECK-LABEL: sdiv_undef_lhs_vec: 131 ; CHECK: # %bb.0: 132 ; CHECK-NEXT: xorps %xmm0, %xmm0 133 ; CHECK-NEXT: retq 134 %r = sdiv <4 x i32> undef, %x 135 ret <4 x i32> %r 136 } 137 138 define i32 @udiv_undef_rhs(i32 %x) { 139 ; CHECK-LABEL: udiv_undef_rhs: 140 ; CHECK: # %bb.0: 141 ; CHECK-NEXT: retq 142 %r = udiv i32 %x, undef 143 ret i32 %r 144 } 145 146 define <4 x i32> @udiv_undef_rhs_vec(<4 x i32> %x) { 147 ; CHECK-LABEL: udiv_undef_rhs_vec: 148 ; CHECK: # %bb.0: 149 ; CHECK-NEXT: retq 150 %r = udiv <4 x i32> %x, undef 151 ret <4 x i32> %r 152 } 153 154 define i32 @udiv_undef_lhs(i32 %x) { 155 ; CHECK-LABEL: udiv_undef_lhs: 156 ; CHECK: # %bb.0: 157 ; CHECK-NEXT: xorl %eax, %eax 158 ; CHECK-NEXT: retq 159 %r = udiv i32 undef, %x 160 ret i32 %r 161 } 162 163 define <4 x i32> @udiv_undef_lhs_vec(<4 x i32> %x) { 164 ; CHECK-LABEL: udiv_undef_lhs_vec: 165 ; CHECK: # %bb.0: 166 ; CHECK-NEXT: xorps %xmm0, %xmm0 167 ; CHECK-NEXT: retq 168 %r = udiv <4 x i32> undef, %x 169 ret <4 x i32> %r 170 } 171 172 define i32 @srem_undef_rhs(i32 %x) { 173 ; CHECK-LABEL: srem_undef_rhs: 174 ; CHECK: # %bb.0: 175 ; CHECK-NEXT: retq 176 %r = srem i32 %x, undef 177 ret i32 %r 178 } 179 180 define <4 x i32> @srem_undef_rhs_vec(<4 x i32> %x) { 181 ; CHECK-LABEL: srem_undef_rhs_vec: 182 ; CHECK: # %bb.0: 183 ; CHECK-NEXT: retq 184 %r = srem <4 x i32> %x, undef 185 ret <4 x i32> %r 186 } 187 188 define i32 @srem_undef_lhs(i32 %x) { 189 ; CHECK-LABEL: srem_undef_lhs: 190 ; CHECK: # %bb.0: 191 ; CHECK-NEXT: xorl %eax, %eax 192 ; CHECK-NEXT: retq 193 %r = srem i32 undef, %x 194 ret i32 %r 195 } 196 197 define <4 x i32> @srem_undef_lhs_vec(<4 x i32> %x) { 198 ; CHECK-LABEL: srem_undef_lhs_vec: 199 ; CHECK: # %bb.0: 200 ; CHECK-NEXT: xorps %xmm0, %xmm0 201 ; CHECK-NEXT: retq 202 %r = srem <4 x i32> undef, %x 203 ret <4 x i32> %r 204 } 205 206 define i32 @urem_undef_rhs(i32 %x) { 207 ; CHECK-LABEL: urem_undef_rhs: 208 ; CHECK: # %bb.0: 209 ; CHECK-NEXT: retq 210 %r = urem i32 %x, undef 211 ret i32 %r 212 } 213 214 define <4 x i32> @urem_undef_rhs_vec(<4 x i32> %x) { 215 ; CHECK-LABEL: urem_undef_rhs_vec: 216 ; CHECK: # %bb.0: 217 ; CHECK-NEXT: retq 218 %r = urem <4 x i32> %x, undef 219 ret <4 x i32> %r 220 } 221 222 define i32 @urem_undef_lhs(i32 %x) { 223 ; CHECK-LABEL: urem_undef_lhs: 224 ; CHECK: # %bb.0: 225 ; CHECK-NEXT: xorl %eax, %eax 226 ; CHECK-NEXT: retq 227 %r = urem i32 undef, %x 228 ret i32 %r 229 } 230 231 define <4 x i32> @urem_undef_lhs_vec(<4 x i32> %x) { 232 ; CHECK-LABEL: urem_undef_lhs_vec: 233 ; CHECK: # %bb.0: 234 ; CHECK-NEXT: xorps %xmm0, %xmm0 235 ; CHECK-NEXT: retq 236 %r = urem <4 x i32> undef, %x 237 ret <4 x i32> %r 238 } 239 240 define i32 @ashr_undef_rhs(i32 %x) { 241 ; CHECK-LABEL: ashr_undef_rhs: 242 ; CHECK: # %bb.0: 243 ; CHECK-NEXT: retq 244 %r = ashr i32 %x, undef 245 ret i32 %r 246 } 247 248 define <4 x i32> @ashr_undef_rhs_vec(<4 x i32> %x) { 249 ; CHECK-LABEL: ashr_undef_rhs_vec: 250 ; CHECK: # %bb.0: 251 ; CHECK-NEXT: retq 252 %r = ashr <4 x i32> %x, undef 253 ret <4 x i32> %r 254 } 255 256 define i32 @ashr_undef_lhs(i32 %x) { 257 ; CHECK-LABEL: ashr_undef_lhs: 258 ; CHECK: # %bb.0: 259 ; CHECK-NEXT: xorl %eax, %eax 260 ; CHECK-NEXT: retq 261 %r = ashr i32 undef, %x 262 ret i32 %r 263 } 264 265 define <4 x i32> @ashr_undef_lhs_vec(<4 x i32> %x) { 266 ; CHECK-LABEL: ashr_undef_lhs_vec: 267 ; CHECK: # %bb.0: 268 ; CHECK-NEXT: xorps %xmm0, %xmm0 269 ; CHECK-NEXT: retq 270 %r = ashr <4 x i32> undef, %x 271 ret <4 x i32> %r 272 } 273 274 define i32 @lshr_undef_rhs(i32 %x) { 275 ; CHECK-LABEL: lshr_undef_rhs: 276 ; CHECK: # %bb.0: 277 ; CHECK-NEXT: retq 278 %r = lshr i32 %x, undef 279 ret i32 %r 280 } 281 282 define <4 x i32> @lshr_undef_rhs_vec(<4 x i32> %x) { 283 ; CHECK-LABEL: lshr_undef_rhs_vec: 284 ; CHECK: # %bb.0: 285 ; CHECK-NEXT: retq 286 %r = lshr <4 x i32> %x, undef 287 ret <4 x i32> %r 288 } 289 290 define i32 @lshr_undef_lhs(i32 %x) { 291 ; CHECK-LABEL: lshr_undef_lhs: 292 ; CHECK: # %bb.0: 293 ; CHECK-NEXT: xorl %eax, %eax 294 ; CHECK-NEXT: retq 295 %r = lshr i32 undef, %x 296 ret i32 %r 297 } 298 299 define <4 x i32> @lshr_undef_lhs_vec(<4 x i32> %x) { 300 ; CHECK-LABEL: lshr_undef_lhs_vec: 301 ; CHECK: # %bb.0: 302 ; CHECK-NEXT: xorps %xmm0, %xmm0 303 ; CHECK-NEXT: retq 304 %r = lshr <4 x i32> undef, %x 305 ret <4 x i32> %r 306 } 307 308 define i32 @shl_undef_rhs(i32 %x) { 309 ; CHECK-LABEL: shl_undef_rhs: 310 ; CHECK: # %bb.0: 311 ; CHECK-NEXT: retq 312 %r = shl i32 %x, undef 313 ret i32 %r 314 } 315 316 define <4 x i32> @shl_undef_rhs_vec(<4 x i32> %x) { 317 ; CHECK-LABEL: shl_undef_rhs_vec: 318 ; CHECK: # %bb.0: 319 ; CHECK-NEXT: retq 320 %r = shl <4 x i32> %x, undef 321 ret <4 x i32> %r 322 } 323 324 define i32 @shl_undef_lhs(i32 %x) { 325 ; CHECK-LABEL: shl_undef_lhs: 326 ; CHECK: # %bb.0: 327 ; CHECK-NEXT: xorl %eax, %eax 328 ; CHECK-NEXT: retq 329 %r = shl i32 undef, %x 330 ret i32 %r 331 } 332 333 define <4 x i32> @shl_undef_lhs_vec(<4 x i32> %x) { 334 ; CHECK-LABEL: shl_undef_lhs_vec: 335 ; CHECK: # %bb.0: 336 ; CHECK-NEXT: xorps %xmm0, %xmm0 337 ; CHECK-NEXT: retq 338 %r = shl <4 x i32> undef, %x 339 ret <4 x i32> %r 340 } 341 342 define i32 @and_undef_rhs(i32 %x) { 343 ; CHECK-LABEL: and_undef_rhs: 344 ; CHECK: # %bb.0: 345 ; CHECK-NEXT: xorl %eax, %eax 346 ; CHECK-NEXT: retq 347 %r = and i32 %x, undef 348 ret i32 %r 349 } 350 351 define <4 x i32> @and_undef_rhs_vec(<4 x i32> %x) { 352 ; CHECK-LABEL: and_undef_rhs_vec: 353 ; CHECK: # %bb.0: 354 ; CHECK-NEXT: xorps %xmm0, %xmm0 355 ; CHECK-NEXT: retq 356 %r = and <4 x i32> %x, undef 357 ret <4 x i32> %r 358 } 359 360 define i32 @and_undef_lhs(i32 %x) { 361 ; CHECK-LABEL: and_undef_lhs: 362 ; CHECK: # %bb.0: 363 ; CHECK-NEXT: xorl %eax, %eax 364 ; CHECK-NEXT: retq 365 %r = and i32 undef, %x 366 ret i32 %r 367 } 368 369 define <4 x i32> @and_undef_lhs_vec(<4 x i32> %x) { 370 ; CHECK-LABEL: and_undef_lhs_vec: 371 ; CHECK: # %bb.0: 372 ; CHECK-NEXT: xorps %xmm0, %xmm0 373 ; CHECK-NEXT: retq 374 %r = and <4 x i32> undef, %x 375 ret <4 x i32> %r 376 } 377 378 define i32 @or_undef_rhs(i32 %x) { 379 ; CHECK-LABEL: or_undef_rhs: 380 ; CHECK: # %bb.0: 381 ; CHECK-NEXT: movl $-1, %eax 382 ; CHECK-NEXT: retq 383 %r = or i32 %x, undef 384 ret i32 %r 385 } 386 387 define <4 x i32> @or_undef_rhs_vec(<4 x i32> %x) { 388 ; CHECK-LABEL: or_undef_rhs_vec: 389 ; CHECK: # %bb.0: 390 ; CHECK-NEXT: pcmpeqd %xmm0, %xmm0 391 ; CHECK-NEXT: retq 392 %r = or <4 x i32> %x, undef 393 ret <4 x i32> %r 394 } 395 396 define i32 @or_undef_lhs(i32 %x) { 397 ; CHECK-LABEL: or_undef_lhs: 398 ; CHECK: # %bb.0: 399 ; CHECK-NEXT: movl $-1, %eax 400 ; CHECK-NEXT: retq 401 %r = or i32 undef, %x 402 ret i32 %r 403 } 404 405 define <4 x i32> @or_undef_lhs_vec(<4 x i32> %x) { 406 ; CHECK-LABEL: or_undef_lhs_vec: 407 ; CHECK: # %bb.0: 408 ; CHECK-NEXT: pcmpeqd %xmm0, %xmm0 409 ; CHECK-NEXT: retq 410 %r = or <4 x i32> undef, %x 411 ret <4 x i32> %r 412 } 413 414 define i32 @xor_undef_rhs(i32 %x) { 415 ; CHECK-LABEL: xor_undef_rhs: 416 ; CHECK: # %bb.0: 417 ; CHECK-NEXT: retq 418 %r = xor i32 %x, undef 419 ret i32 %r 420 } 421 422 define <4 x i32> @xor_undef_rhs_vec(<4 x i32> %x) { 423 ; CHECK-LABEL: xor_undef_rhs_vec: 424 ; CHECK: # %bb.0: 425 ; CHECK-NEXT: retq 426 %r = xor <4 x i32> %x, undef 427 ret <4 x i32> %r 428 } 429 430 define i32 @xor_undef_lhs(i32 %x) { 431 ; CHECK-LABEL: xor_undef_lhs: 432 ; CHECK: # %bb.0: 433 ; CHECK-NEXT: retq 434 %r = xor i32 undef, %x 435 ret i32 %r 436 } 437 438 define <4 x i32> @xor_undef_lhs_vec(<4 x i32> %x) { 439 ; CHECK-LABEL: xor_undef_lhs_vec: 440 ; CHECK: # %bb.0: 441 ; CHECK-NEXT: retq 442 %r = xor <4 x i32> undef, %x 443 ret <4 x i32> %r 444 } 445 446 ; This would crash because the shift amount is an i8 operand, 447 ; but the result of the shift is i32. We can't just propagate 448 ; the existing undef as the result. 449 450 define i1 @undef_operand_size_not_same_as_result() { 451 ; CHECK-LABEL: undef_operand_size_not_same_as_result: 452 ; CHECK: # %bb.0: 453 ; CHECK-NEXT: testl %eax, %eax 454 ; CHECK-NEXT: sete %al 455 ; CHECK-NEXT: retq 456 %sh = shl i32 7, undef 457 %cmp = icmp eq i32 0, %sh 458 ret i1 %cmp 459 } 460 461
