1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 4 5 ; If we have SSE/AVX intrinsics in the code, we miss obvious combines 6 ; unless we do them late on X86-specific nodes. 7 8 declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) 9 10 define <4 x i32> @PR27924_cmpeq(<4 x i32> %a, <4 x i32> %b) { 11 ; SSE-LABEL: PR27924_cmpeq: 12 ; SSE: # %bb.0: 13 ; SSE-NEXT: pcmpeqd %xmm0, %xmm0 14 ; SSE-NEXT: retq 15 ; 16 ; AVX-LABEL: PR27924_cmpeq: 17 ; AVX: # %bb.0: 18 ; AVX-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 19 ; AVX-NEXT: retq 20 %cmp = icmp sgt <4 x i32> %a, %b 21 %max = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> %b 22 %sse_max = tail call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a, <4 x i32> %b) 23 %truth = icmp eq <4 x i32> %max, %sse_max 24 %ret = sext <4 x i1> %truth to <4 x i32> 25 ret <4 x i32> %ret 26 } 27 28 define <4 x i32> @PR27924_cmpgt(<4 x i32> %a, <4 x i32> %b) { 29 ; SSE-LABEL: PR27924_cmpgt: 30 ; SSE: # %bb.0: 31 ; SSE-NEXT: xorps %xmm0, %xmm0 32 ; SSE-NEXT: retq 33 ; 34 ; AVX-LABEL: PR27924_cmpgt: 35 ; AVX: # %bb.0: 36 ; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0 37 ; AVX-NEXT: retq 38 %cmp = icmp sgt <4 x i32> %a, %b 39 %max = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> %b 40 %sse_max = tail call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a, <4 x i32> %b) 41 %untruth = icmp sgt <4 x i32> %max, %sse_max 42 %ret = sext <4 x i1> %untruth to <4 x i32> 43 ret <4 x i32> %ret 44 } 45 46
